esp32c3/usb_device/
jfifo_st.rs

1#[doc = "Register `JFIFO_ST` reader"]
2pub type R = crate::R<JFIFO_ST_SPEC>;
3#[doc = "Register `JFIFO_ST` writer"]
4pub type W = crate::W<JFIFO_ST_SPEC>;
5#[doc = "Field `IN_FIFO_CNT` reader - JTAT in fifo counter."]
6pub type IN_FIFO_CNT_R = crate::FieldReader;
7#[doc = "Field `IN_FIFO_EMPTY` reader - 1: JTAG in fifo is empty."]
8pub type IN_FIFO_EMPTY_R = crate::BitReader;
9#[doc = "Field `IN_FIFO_FULL` reader - 1: JTAG in fifo is full."]
10pub type IN_FIFO_FULL_R = crate::BitReader;
11#[doc = "Field `OUT_FIFO_CNT` reader - JTAT out fifo counter."]
12pub type OUT_FIFO_CNT_R = crate::FieldReader;
13#[doc = "Field `OUT_FIFO_EMPTY` reader - 1: JTAG out fifo is empty."]
14pub type OUT_FIFO_EMPTY_R = crate::BitReader;
15#[doc = "Field `OUT_FIFO_FULL` reader - 1: JTAG out fifo is full."]
16pub type OUT_FIFO_FULL_R = crate::BitReader;
17#[doc = "Field `IN_FIFO_RESET` reader - Write 1 to reset JTAG in fifo."]
18pub type IN_FIFO_RESET_R = crate::BitReader;
19#[doc = "Field `IN_FIFO_RESET` writer - Write 1 to reset JTAG in fifo."]
20pub type IN_FIFO_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `OUT_FIFO_RESET` reader - Write 1 to reset JTAG out fifo."]
22pub type OUT_FIFO_RESET_R = crate::BitReader;
23#[doc = "Field `OUT_FIFO_RESET` writer - Write 1 to reset JTAG out fifo."]
24pub type OUT_FIFO_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26    #[doc = "Bits 0:1 - JTAT in fifo counter."]
27    #[inline(always)]
28    pub fn in_fifo_cnt(&self) -> IN_FIFO_CNT_R {
29        IN_FIFO_CNT_R::new((self.bits & 3) as u8)
30    }
31    #[doc = "Bit 2 - 1: JTAG in fifo is empty."]
32    #[inline(always)]
33    pub fn in_fifo_empty(&self) -> IN_FIFO_EMPTY_R {
34        IN_FIFO_EMPTY_R::new(((self.bits >> 2) & 1) != 0)
35    }
36    #[doc = "Bit 3 - 1: JTAG in fifo is full."]
37    #[inline(always)]
38    pub fn in_fifo_full(&self) -> IN_FIFO_FULL_R {
39        IN_FIFO_FULL_R::new(((self.bits >> 3) & 1) != 0)
40    }
41    #[doc = "Bits 4:5 - JTAT out fifo counter."]
42    #[inline(always)]
43    pub fn out_fifo_cnt(&self) -> OUT_FIFO_CNT_R {
44        OUT_FIFO_CNT_R::new(((self.bits >> 4) & 3) as u8)
45    }
46    #[doc = "Bit 6 - 1: JTAG out fifo is empty."]
47    #[inline(always)]
48    pub fn out_fifo_empty(&self) -> OUT_FIFO_EMPTY_R {
49        OUT_FIFO_EMPTY_R::new(((self.bits >> 6) & 1) != 0)
50    }
51    #[doc = "Bit 7 - 1: JTAG out fifo is full."]
52    #[inline(always)]
53    pub fn out_fifo_full(&self) -> OUT_FIFO_FULL_R {
54        OUT_FIFO_FULL_R::new(((self.bits >> 7) & 1) != 0)
55    }
56    #[doc = "Bit 8 - Write 1 to reset JTAG in fifo."]
57    #[inline(always)]
58    pub fn in_fifo_reset(&self) -> IN_FIFO_RESET_R {
59        IN_FIFO_RESET_R::new(((self.bits >> 8) & 1) != 0)
60    }
61    #[doc = "Bit 9 - Write 1 to reset JTAG out fifo."]
62    #[inline(always)]
63    pub fn out_fifo_reset(&self) -> OUT_FIFO_RESET_R {
64        OUT_FIFO_RESET_R::new(((self.bits >> 9) & 1) != 0)
65    }
66}
67#[cfg(feature = "impl-register-debug")]
68impl core::fmt::Debug for R {
69    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
70        f.debug_struct("JFIFO_ST")
71            .field("in_fifo_cnt", &self.in_fifo_cnt())
72            .field("in_fifo_empty", &self.in_fifo_empty())
73            .field("in_fifo_full", &self.in_fifo_full())
74            .field("out_fifo_cnt", &self.out_fifo_cnt())
75            .field("out_fifo_empty", &self.out_fifo_empty())
76            .field("out_fifo_full", &self.out_fifo_full())
77            .field("in_fifo_reset", &self.in_fifo_reset())
78            .field("out_fifo_reset", &self.out_fifo_reset())
79            .finish()
80    }
81}
82impl W {
83    #[doc = "Bit 8 - Write 1 to reset JTAG in fifo."]
84    #[inline(always)]
85    pub fn in_fifo_reset(&mut self) -> IN_FIFO_RESET_W<JFIFO_ST_SPEC> {
86        IN_FIFO_RESET_W::new(self, 8)
87    }
88    #[doc = "Bit 9 - Write 1 to reset JTAG out fifo."]
89    #[inline(always)]
90    pub fn out_fifo_reset(&mut self) -> OUT_FIFO_RESET_W<JFIFO_ST_SPEC> {
91        OUT_FIFO_RESET_W::new(self, 9)
92    }
93}
94#[doc = "USB_DEVICE_JFIFO_ST_REG.\n\nYou can [`read`](crate::Reg::read) this register and get [`jfifo_st::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`jfifo_st::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
95pub struct JFIFO_ST_SPEC;
96impl crate::RegisterSpec for JFIFO_ST_SPEC {
97    type Ux = u32;
98}
99#[doc = "`read()` method returns [`jfifo_st::R`](R) reader structure"]
100impl crate::Readable for JFIFO_ST_SPEC {}
101#[doc = "`write(|w| ..)` method takes [`jfifo_st::W`](W) writer structure"]
102impl crate::Writable for JFIFO_ST_SPEC {
103    type Safety = crate::Unsafe;
104}
105#[doc = "`reset()` method sets JFIFO_ST to value 0x44"]
106impl crate::Resettable for JFIFO_ST_SPEC {
107    const RESET_VALUE: u32 = 0x44;
108}
esp32c3/usb_device/jfifo_st.rs

esp32c3/usb_device/
jfifo_st.rs
