1#[doc = "Register `TX_TDM_CTRL` reader"]
2pub type R = crate::R<TX_TDM_CTRL_SPEC>;
3#[doc = "Register `TX_TDM_CTRL` writer"]
4pub type W = crate::W<TX_TDM_CTRL_SPEC>;
5#[doc = "Field `TX_TDM_CHAN0_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 0. 0: Disable, just output 0 in this channel."]
6pub type TX_TDM_CHAN0_EN_R = crate::BitReader;
7#[doc = "Field `TX_TDM_CHAN0_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 0. 0: Disable, just output 0 in this channel."]
8pub type TX_TDM_CHAN0_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TX_TDM_CHAN1_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 1. 0: Disable, just output 0 in this channel."]
10pub type TX_TDM_CHAN1_EN_R = crate::BitReader;
11#[doc = "Field `TX_TDM_CHAN1_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 1. 0: Disable, just output 0 in this channel."]
12pub type TX_TDM_CHAN1_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TX_TDM_CHAN2_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 2. 0: Disable, just output 0 in this channel."]
14pub type TX_TDM_CHAN2_EN_R = crate::BitReader;
15#[doc = "Field `TX_TDM_CHAN2_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 2. 0: Disable, just output 0 in this channel."]
16pub type TX_TDM_CHAN2_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `TX_TDM_CHAN3_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 3. 0: Disable, just output 0 in this channel."]
18pub type TX_TDM_CHAN3_EN_R = crate::BitReader;
19#[doc = "Field `TX_TDM_CHAN3_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 3. 0: Disable, just output 0 in this channel."]
20pub type TX_TDM_CHAN3_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `TX_TDM_CHAN4_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 4. 0: Disable, just output 0 in this channel."]
22pub type TX_TDM_CHAN4_EN_R = crate::BitReader;
23#[doc = "Field `TX_TDM_CHAN4_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 4. 0: Disable, just output 0 in this channel."]
24pub type TX_TDM_CHAN4_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `TX_TDM_CHAN5_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 5. 0: Disable, just output 0 in this channel."]
26pub type TX_TDM_CHAN5_EN_R = crate::BitReader;
27#[doc = "Field `TX_TDM_CHAN5_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 5. 0: Disable, just output 0 in this channel."]
28pub type TX_TDM_CHAN5_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `TX_TDM_CHAN6_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 6. 0: Disable, just output 0 in this channel."]
30pub type TX_TDM_CHAN6_EN_R = crate::BitReader;
31#[doc = "Field `TX_TDM_CHAN6_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 6. 0: Disable, just output 0 in this channel."]
32pub type TX_TDM_CHAN6_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `TX_TDM_CHAN7_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 7. 0: Disable, just output 0 in this channel."]
34pub type TX_TDM_CHAN7_EN_R = crate::BitReader;
35#[doc = "Field `TX_TDM_CHAN7_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 7. 0: Disable, just output 0 in this channel."]
36pub type TX_TDM_CHAN7_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `TX_TDM_CHAN8_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 8. 0: Disable, just output 0 in this channel."]
38pub type TX_TDM_CHAN8_EN_R = crate::BitReader;
39#[doc = "Field `TX_TDM_CHAN8_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 8. 0: Disable, just output 0 in this channel."]
40pub type TX_TDM_CHAN8_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `TX_TDM_CHAN9_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 9. 0: Disable, just output 0 in this channel."]
42pub type TX_TDM_CHAN9_EN_R = crate::BitReader;
43#[doc = "Field `TX_TDM_CHAN9_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 9. 0: Disable, just output 0 in this channel."]
44pub type TX_TDM_CHAN9_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `TX_TDM_CHAN10_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 10. 0: Disable, just output 0 in this channel."]
46pub type TX_TDM_CHAN10_EN_R = crate::BitReader;
47#[doc = "Field `TX_TDM_CHAN10_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 10. 0: Disable, just output 0 in this channel."]
48pub type TX_TDM_CHAN10_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `TX_TDM_CHAN11_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 11. 0: Disable, just output 0 in this channel."]
50pub type TX_TDM_CHAN11_EN_R = crate::BitReader;
51#[doc = "Field `TX_TDM_CHAN11_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 11. 0: Disable, just output 0 in this channel."]
52pub type TX_TDM_CHAN11_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `TX_TDM_CHAN12_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 12. 0: Disable, just output 0 in this channel."]
54pub type TX_TDM_CHAN12_EN_R = crate::BitReader;
55#[doc = "Field `TX_TDM_CHAN12_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 12. 0: Disable, just output 0 in this channel."]
56pub type TX_TDM_CHAN12_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `TX_TDM_CHAN13_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 13. 0: Disable, just output 0 in this channel."]
58pub type TX_TDM_CHAN13_EN_R = crate::BitReader;
59#[doc = "Field `TX_TDM_CHAN13_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 13. 0: Disable, just output 0 in this channel."]
60pub type TX_TDM_CHAN13_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `TX_TDM_CHAN14_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 14. 0: Disable, just output 0 in this channel."]
62pub type TX_TDM_CHAN14_EN_R = crate::BitReader;
63#[doc = "Field `TX_TDM_CHAN14_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 14. 0: Disable, just output 0 in this channel."]
64pub type TX_TDM_CHAN14_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `TX_TDM_CHAN15_EN` reader - 1: Enable the valid data output of I2S TX TDM channel 15. 0: Disable, just output 0 in this channel."]
66pub type TX_TDM_CHAN15_EN_R = crate::BitReader;
67#[doc = "Field `TX_TDM_CHAN15_EN` writer - 1: Enable the valid data output of I2S TX TDM channel 15. 0: Disable, just output 0 in this channel."]
68pub type TX_TDM_CHAN15_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `TX_TDM_TOT_CHAN_NUM` reader - The total channel number of I2S TX TDM mode."]
70pub type TX_TDM_TOT_CHAN_NUM_R = crate::FieldReader;
71#[doc = "Field `TX_TDM_TOT_CHAN_NUM` writer - The total channel number of I2S TX TDM mode."]
72pub type TX_TDM_TOT_CHAN_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
73#[doc = "Field `TX_TDM_SKIP_MSK_EN` reader - When DMA TX buffer stores the data of (REG_TX_TDM_TOT_CHAN_NUM + 1) channels, and only the data of the enabled channels is sent, then this bit should be set. Clear it when all the data stored in DMA TX buffer is for enabled channels."]
74pub type TX_TDM_SKIP_MSK_EN_R = crate::BitReader;
75#[doc = "Field `TX_TDM_SKIP_MSK_EN` writer - When DMA TX buffer stores the data of (REG_TX_TDM_TOT_CHAN_NUM + 1) channels, and only the data of the enabled channels is sent, then this bit should be set. Clear it when all the data stored in DMA TX buffer is for enabled channels."]
76pub type TX_TDM_SKIP_MSK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
77impl R {
78 #[doc = "Bit 0 - 1: Enable the valid data output of I2S TX TDM channel 0. 0: Disable, just output 0 in this channel."]
79 #[inline(always)]
80 pub fn tx_tdm_chan0_en(&self) -> TX_TDM_CHAN0_EN_R {
81 TX_TDM_CHAN0_EN_R::new((self.bits & 1) != 0)
82 }
83 #[doc = "Bit 1 - 1: Enable the valid data output of I2S TX TDM channel 1. 0: Disable, just output 0 in this channel."]
84 #[inline(always)]
85 pub fn tx_tdm_chan1_en(&self) -> TX_TDM_CHAN1_EN_R {
86 TX_TDM_CHAN1_EN_R::new(((self.bits >> 1) & 1) != 0)
87 }
88 #[doc = "Bit 2 - 1: Enable the valid data output of I2S TX TDM channel 2. 0: Disable, just output 0 in this channel."]
89 #[inline(always)]
90 pub fn tx_tdm_chan2_en(&self) -> TX_TDM_CHAN2_EN_R {
91 TX_TDM_CHAN2_EN_R::new(((self.bits >> 2) & 1) != 0)
92 }
93 #[doc = "Bit 3 - 1: Enable the valid data output of I2S TX TDM channel 3. 0: Disable, just output 0 in this channel."]
94 #[inline(always)]
95 pub fn tx_tdm_chan3_en(&self) -> TX_TDM_CHAN3_EN_R {
96 TX_TDM_CHAN3_EN_R::new(((self.bits >> 3) & 1) != 0)
97 }
98 #[doc = "Bit 4 - 1: Enable the valid data output of I2S TX TDM channel 4. 0: Disable, just output 0 in this channel."]
99 #[inline(always)]
100 pub fn tx_tdm_chan4_en(&self) -> TX_TDM_CHAN4_EN_R {
101 TX_TDM_CHAN4_EN_R::new(((self.bits >> 4) & 1) != 0)
102 }
103 #[doc = "Bit 5 - 1: Enable the valid data output of I2S TX TDM channel 5. 0: Disable, just output 0 in this channel."]
104 #[inline(always)]
105 pub fn tx_tdm_chan5_en(&self) -> TX_TDM_CHAN5_EN_R {
106 TX_TDM_CHAN5_EN_R::new(((self.bits >> 5) & 1) != 0)
107 }
108 #[doc = "Bit 6 - 1: Enable the valid data output of I2S TX TDM channel 6. 0: Disable, just output 0 in this channel."]
109 #[inline(always)]
110 pub fn tx_tdm_chan6_en(&self) -> TX_TDM_CHAN6_EN_R {
111 TX_TDM_CHAN6_EN_R::new(((self.bits >> 6) & 1) != 0)
112 }
113 #[doc = "Bit 7 - 1: Enable the valid data output of I2S TX TDM channel 7. 0: Disable, just output 0 in this channel."]
114 #[inline(always)]
115 pub fn tx_tdm_chan7_en(&self) -> TX_TDM_CHAN7_EN_R {
116 TX_TDM_CHAN7_EN_R::new(((self.bits >> 7) & 1) != 0)
117 }
118 #[doc = "Bit 8 - 1: Enable the valid data output of I2S TX TDM channel 8. 0: Disable, just output 0 in this channel."]
119 #[inline(always)]
120 pub fn tx_tdm_chan8_en(&self) -> TX_TDM_CHAN8_EN_R {
121 TX_TDM_CHAN8_EN_R::new(((self.bits >> 8) & 1) != 0)
122 }
123 #[doc = "Bit 9 - 1: Enable the valid data output of I2S TX TDM channel 9. 0: Disable, just output 0 in this channel."]
124 #[inline(always)]
125 pub fn tx_tdm_chan9_en(&self) -> TX_TDM_CHAN9_EN_R {
126 TX_TDM_CHAN9_EN_R::new(((self.bits >> 9) & 1) != 0)
127 }
128 #[doc = "Bit 10 - 1: Enable the valid data output of I2S TX TDM channel 10. 0: Disable, just output 0 in this channel."]
129 #[inline(always)]
130 pub fn tx_tdm_chan10_en(&self) -> TX_TDM_CHAN10_EN_R {
131 TX_TDM_CHAN10_EN_R::new(((self.bits >> 10) & 1) != 0)
132 }
133 #[doc = "Bit 11 - 1: Enable the valid data output of I2S TX TDM channel 11. 0: Disable, just output 0 in this channel."]
134 #[inline(always)]
135 pub fn tx_tdm_chan11_en(&self) -> TX_TDM_CHAN11_EN_R {
136 TX_TDM_CHAN11_EN_R::new(((self.bits >> 11) & 1) != 0)
137 }
138 #[doc = "Bit 12 - 1: Enable the valid data output of I2S TX TDM channel 12. 0: Disable, just output 0 in this channel."]
139 #[inline(always)]
140 pub fn tx_tdm_chan12_en(&self) -> TX_TDM_CHAN12_EN_R {
141 TX_TDM_CHAN12_EN_R::new(((self.bits >> 12) & 1) != 0)
142 }
143 #[doc = "Bit 13 - 1: Enable the valid data output of I2S TX TDM channel 13. 0: Disable, just output 0 in this channel."]
144 #[inline(always)]
145 pub fn tx_tdm_chan13_en(&self) -> TX_TDM_CHAN13_EN_R {
146 TX_TDM_CHAN13_EN_R::new(((self.bits >> 13) & 1) != 0)
147 }
148 #[doc = "Bit 14 - 1: Enable the valid data output of I2S TX TDM channel 14. 0: Disable, just output 0 in this channel."]
149 #[inline(always)]
150 pub fn tx_tdm_chan14_en(&self) -> TX_TDM_CHAN14_EN_R {
151 TX_TDM_CHAN14_EN_R::new(((self.bits >> 14) & 1) != 0)
152 }
153 #[doc = "Bit 15 - 1: Enable the valid data output of I2S TX TDM channel 15. 0: Disable, just output 0 in this channel."]
154 #[inline(always)]
155 pub fn tx_tdm_chan15_en(&self) -> TX_TDM_CHAN15_EN_R {
156 TX_TDM_CHAN15_EN_R::new(((self.bits >> 15) & 1) != 0)
157 }
158 #[doc = "Bits 16:19 - The total channel number of I2S TX TDM mode."]
159 #[inline(always)]
160 pub fn tx_tdm_tot_chan_num(&self) -> TX_TDM_TOT_CHAN_NUM_R {
161 TX_TDM_TOT_CHAN_NUM_R::new(((self.bits >> 16) & 0x0f) as u8)
162 }
163 #[doc = "Bit 20 - When DMA TX buffer stores the data of (REG_TX_TDM_TOT_CHAN_NUM + 1) channels, and only the data of the enabled channels is sent, then this bit should be set. Clear it when all the data stored in DMA TX buffer is for enabled channels."]
164 #[inline(always)]
165 pub fn tx_tdm_skip_msk_en(&self) -> TX_TDM_SKIP_MSK_EN_R {
166 TX_TDM_SKIP_MSK_EN_R::new(((self.bits >> 20) & 1) != 0)
167 }
168}
169#[cfg(feature = "impl-register-debug")]
170impl core::fmt::Debug for R {
171 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
172 f.debug_struct("TX_TDM_CTRL")
173 .field("tx_tdm_chan0_en", &self.tx_tdm_chan0_en())
174 .field("tx_tdm_chan1_en", &self.tx_tdm_chan1_en())
175 .field("tx_tdm_chan2_en", &self.tx_tdm_chan2_en())
176 .field("tx_tdm_chan3_en", &self.tx_tdm_chan3_en())
177 .field("tx_tdm_chan4_en", &self.tx_tdm_chan4_en())
178 .field("tx_tdm_chan5_en", &self.tx_tdm_chan5_en())
179 .field("tx_tdm_chan6_en", &self.tx_tdm_chan6_en())
180 .field("tx_tdm_chan7_en", &self.tx_tdm_chan7_en())
181 .field("tx_tdm_chan8_en", &self.tx_tdm_chan8_en())
182 .field("tx_tdm_chan9_en", &self.tx_tdm_chan9_en())
183 .field("tx_tdm_chan10_en", &self.tx_tdm_chan10_en())
184 .field("tx_tdm_chan11_en", &self.tx_tdm_chan11_en())
185 .field("tx_tdm_chan12_en", &self.tx_tdm_chan12_en())
186 .field("tx_tdm_chan13_en", &self.tx_tdm_chan13_en())
187 .field("tx_tdm_chan14_en", &self.tx_tdm_chan14_en())
188 .field("tx_tdm_chan15_en", &self.tx_tdm_chan15_en())
189 .field("tx_tdm_tot_chan_num", &self.tx_tdm_tot_chan_num())
190 .field("tx_tdm_skip_msk_en", &self.tx_tdm_skip_msk_en())
191 .finish()
192 }
193}
194impl W {
195 #[doc = "Bit 0 - 1: Enable the valid data output of I2S TX TDM channel 0. 0: Disable, just output 0 in this channel."]
196 #[inline(always)]
197 pub fn tx_tdm_chan0_en(&mut self) -> TX_TDM_CHAN0_EN_W<TX_TDM_CTRL_SPEC> {
198 TX_TDM_CHAN0_EN_W::new(self, 0)
199 }
200 #[doc = "Bit 1 - 1: Enable the valid data output of I2S TX TDM channel 1. 0: Disable, just output 0 in this channel."]
201 #[inline(always)]
202 pub fn tx_tdm_chan1_en(&mut self) -> TX_TDM_CHAN1_EN_W<TX_TDM_CTRL_SPEC> {
203 TX_TDM_CHAN1_EN_W::new(self, 1)
204 }
205 #[doc = "Bit 2 - 1: Enable the valid data output of I2S TX TDM channel 2. 0: Disable, just output 0 in this channel."]
206 #[inline(always)]
207 pub fn tx_tdm_chan2_en(&mut self) -> TX_TDM_CHAN2_EN_W<TX_TDM_CTRL_SPEC> {
208 TX_TDM_CHAN2_EN_W::new(self, 2)
209 }
210 #[doc = "Bit 3 - 1: Enable the valid data output of I2S TX TDM channel 3. 0: Disable, just output 0 in this channel."]
211 #[inline(always)]
212 pub fn tx_tdm_chan3_en(&mut self) -> TX_TDM_CHAN3_EN_W<TX_TDM_CTRL_SPEC> {
213 TX_TDM_CHAN3_EN_W::new(self, 3)
214 }
215 #[doc = "Bit 4 - 1: Enable the valid data output of I2S TX TDM channel 4. 0: Disable, just output 0 in this channel."]
216 #[inline(always)]
217 pub fn tx_tdm_chan4_en(&mut self) -> TX_TDM_CHAN4_EN_W<TX_TDM_CTRL_SPEC> {
218 TX_TDM_CHAN4_EN_W::new(self, 4)
219 }
220 #[doc = "Bit 5 - 1: Enable the valid data output of I2S TX TDM channel 5. 0: Disable, just output 0 in this channel."]
221 #[inline(always)]
222 pub fn tx_tdm_chan5_en(&mut self) -> TX_TDM_CHAN5_EN_W<TX_TDM_CTRL_SPEC> {
223 TX_TDM_CHAN5_EN_W::new(self, 5)
224 }
225 #[doc = "Bit 6 - 1: Enable the valid data output of I2S TX TDM channel 6. 0: Disable, just output 0 in this channel."]
226 #[inline(always)]
227 pub fn tx_tdm_chan6_en(&mut self) -> TX_TDM_CHAN6_EN_W<TX_TDM_CTRL_SPEC> {
228 TX_TDM_CHAN6_EN_W::new(self, 6)
229 }
230 #[doc = "Bit 7 - 1: Enable the valid data output of I2S TX TDM channel 7. 0: Disable, just output 0 in this channel."]
231 #[inline(always)]
232 pub fn tx_tdm_chan7_en(&mut self) -> TX_TDM_CHAN7_EN_W<TX_TDM_CTRL_SPEC> {
233 TX_TDM_CHAN7_EN_W::new(self, 7)
234 }
235 #[doc = "Bit 8 - 1: Enable the valid data output of I2S TX TDM channel 8. 0: Disable, just output 0 in this channel."]
236 #[inline(always)]
237 pub fn tx_tdm_chan8_en(&mut self) -> TX_TDM_CHAN8_EN_W<TX_TDM_CTRL_SPEC> {
238 TX_TDM_CHAN8_EN_W::new(self, 8)
239 }
240 #[doc = "Bit 9 - 1: Enable the valid data output of I2S TX TDM channel 9. 0: Disable, just output 0 in this channel."]
241 #[inline(always)]
242 pub fn tx_tdm_chan9_en(&mut self) -> TX_TDM_CHAN9_EN_W<TX_TDM_CTRL_SPEC> {
243 TX_TDM_CHAN9_EN_W::new(self, 9)
244 }
245 #[doc = "Bit 10 - 1: Enable the valid data output of I2S TX TDM channel 10. 0: Disable, just output 0 in this channel."]
246 #[inline(always)]
247 pub fn tx_tdm_chan10_en(&mut self) -> TX_TDM_CHAN10_EN_W<TX_TDM_CTRL_SPEC> {
248 TX_TDM_CHAN10_EN_W::new(self, 10)
249 }
250 #[doc = "Bit 11 - 1: Enable the valid data output of I2S TX TDM channel 11. 0: Disable, just output 0 in this channel."]
251 #[inline(always)]
252 pub fn tx_tdm_chan11_en(&mut self) -> TX_TDM_CHAN11_EN_W<TX_TDM_CTRL_SPEC> {
253 TX_TDM_CHAN11_EN_W::new(self, 11)
254 }
255 #[doc = "Bit 12 - 1: Enable the valid data output of I2S TX TDM channel 12. 0: Disable, just output 0 in this channel."]
256 #[inline(always)]
257 pub fn tx_tdm_chan12_en(&mut self) -> TX_TDM_CHAN12_EN_W<TX_TDM_CTRL_SPEC> {
258 TX_TDM_CHAN12_EN_W::new(self, 12)
259 }
260 #[doc = "Bit 13 - 1: Enable the valid data output of I2S TX TDM channel 13. 0: Disable, just output 0 in this channel."]
261 #[inline(always)]
262 pub fn tx_tdm_chan13_en(&mut self) -> TX_TDM_CHAN13_EN_W<TX_TDM_CTRL_SPEC> {
263 TX_TDM_CHAN13_EN_W::new(self, 13)
264 }
265 #[doc = "Bit 14 - 1: Enable the valid data output of I2S TX TDM channel 14. 0: Disable, just output 0 in this channel."]
266 #[inline(always)]
267 pub fn tx_tdm_chan14_en(&mut self) -> TX_TDM_CHAN14_EN_W<TX_TDM_CTRL_SPEC> {
268 TX_TDM_CHAN14_EN_W::new(self, 14)
269 }
270 #[doc = "Bit 15 - 1: Enable the valid data output of I2S TX TDM channel 15. 0: Disable, just output 0 in this channel."]
271 #[inline(always)]
272 pub fn tx_tdm_chan15_en(&mut self) -> TX_TDM_CHAN15_EN_W<TX_TDM_CTRL_SPEC> {
273 TX_TDM_CHAN15_EN_W::new(self, 15)
274 }
275 #[doc = "Bits 16:19 - The total channel number of I2S TX TDM mode."]
276 #[inline(always)]
277 pub fn tx_tdm_tot_chan_num(&mut self) -> TX_TDM_TOT_CHAN_NUM_W<TX_TDM_CTRL_SPEC> {
278 TX_TDM_TOT_CHAN_NUM_W::new(self, 16)
279 }
280 #[doc = "Bit 20 - When DMA TX buffer stores the data of (REG_TX_TDM_TOT_CHAN_NUM + 1) channels, and only the data of the enabled channels is sent, then this bit should be set. Clear it when all the data stored in DMA TX buffer is for enabled channels."]
281 #[inline(always)]
282 pub fn tx_tdm_skip_msk_en(&mut self) -> TX_TDM_SKIP_MSK_EN_W<TX_TDM_CTRL_SPEC> {
283 TX_TDM_SKIP_MSK_EN_W::new(self, 20)
284 }
285}
286#[doc = "I2S TX TDM mode control register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_tdm_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_tdm_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
287pub struct TX_TDM_CTRL_SPEC;
288impl crate::RegisterSpec for TX_TDM_CTRL_SPEC {
289 type Ux = u32;
290}
291#[doc = "`read()` method returns [`tx_tdm_ctrl::R`](R) reader structure"]
292impl crate::Readable for TX_TDM_CTRL_SPEC {}
293#[doc = "`write(|w| ..)` method takes [`tx_tdm_ctrl::W`](W) writer structure"]
294impl crate::Writable for TX_TDM_CTRL_SPEC {
295 type Safety = crate::Unsafe;
296}
297#[doc = "`reset()` method sets TX_TDM_CTRL to value 0xffff"]
298impl crate::Resettable for TX_TDM_CTRL_SPEC {
299 const RESET_VALUE: u32 = 0xffff;
300}