Struct esp32c3::extmem::icache_atomic_operate_ena::R

pub struct R(_);

Register ICACHE_ATOMIC_OPERATE_ENA reader

Implementations

impl R

pub fn icache_atomic_operate_ena(&self) -> ICACHE_ATOMIC_OPERATE_ENA_R

Bit 0 - The bit is used to activate icache atomic operation protection. In this case, sync/lock operation can not interrupt miss-work. This feature does not work during invalidateAll operation.

Methods from Deref<Target = R<ICACHE_ATOMIC_OPERATE_ENA_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<ICACHE_ATOMIC_OPERATE_ENA_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<ICACHE_ATOMIC_OPERATE_ENA_SPEC>> for R

fn from(reader: R<ICACHE_ATOMIC_OPERATE_ENA_SPEC>) -> Self

Performs the conversion.