esp32c3/efuse/
rd_mac_spi_sys_5.rs

1#[doc = "Register `RD_MAC_SPI_SYS_5` reader"]
2pub type R = crate::R<RD_MAC_SPI_SYS_5_SPEC>;
3#[doc = "Field `SYS_DATA_PART0_2` reader - Stores the second 32 bits of the zeroth part of system data."]
4pub type SYS_DATA_PART0_2_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31 - Stores the second 32 bits of the zeroth part of system data."]
7    #[inline(always)]
8    pub fn sys_data_part0_2(&self) -> SYS_DATA_PART0_2_R {
9        SYS_DATA_PART0_2_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("RD_MAC_SPI_SYS_5")
16            .field("sys_data_part0_2", &self.sys_data_part0_2())
17            .finish()
18    }
19}
20#[doc = "BLOCK1 data register 5.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_mac_spi_sys_5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct RD_MAC_SPI_SYS_5_SPEC;
22impl crate::RegisterSpec for RD_MAC_SPI_SYS_5_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`rd_mac_spi_sys_5::R`](R) reader structure"]
26impl crate::Readable for RD_MAC_SPI_SYS_5_SPEC {}
27#[doc = "`reset()` method sets RD_MAC_SPI_SYS_5 to value 0"]
28impl crate::Resettable for RD_MAC_SPI_SYS_5_SPEC {
29    const RESET_VALUE: u32 = 0;
30}
esp32c3/efuse/rd_mac_spi_sys_5.rs

esp32c3/efuse/
rd_mac_spi_sys_5.rs
