Type Alias esp32c3::i2s0::rx_clkm_conf::W
source · pub type W = W<RX_CLKM_CONF_SPEC>;
Expand description
Register RX_CLKM_CONF
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn rx_clkm_div_num(&mut self) -> RX_CLKM_DIV_NUM_W<'_, RX_CLKM_CONF_SPEC>
pub fn rx_clkm_div_num(&mut self) -> RX_CLKM_DIV_NUM_W<'_, RX_CLKM_CONF_SPEC>
Bits 0:7 - Integral I2S clock divider value
sourcepub fn rx_clk_active(&mut self) -> RX_CLK_ACTIVE_W<'_, RX_CLKM_CONF_SPEC>
pub fn rx_clk_active(&mut self) -> RX_CLK_ACTIVE_W<'_, RX_CLKM_CONF_SPEC>
Bit 26 - I2S Rx module clock enable signal.
sourcepub fn rx_clk_sel(&mut self) -> RX_CLK_SEL_W<'_, RX_CLKM_CONF_SPEC>
pub fn rx_clk_sel(&mut self) -> RX_CLK_SEL_W<'_, RX_CLKM_CONF_SPEC>
Bits 27:28 - Select I2S Rx module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_in.
sourcepub fn mclk_sel(&mut self) -> MCLK_SEL_W<'_, RX_CLKM_CONF_SPEC>
pub fn mclk_sel(&mut self) -> MCLK_SEL_W<'_, RX_CLKM_CONF_SPEC>
Bit 29 - 0: UseI2S Tx module clock as I2S_MCLK_OUT. 1: UseI2S Rx module clock as I2S_MCLK_OUT.