Struct esp32c3::system::perip_clk_en0::PERIP_CLK_EN0_SPEC

pub struct PERIP_CLK_EN0_SPEC;

peripheral clock gating register

You can read this register and get perip_clk_en0::R. You can reset, write, write_with_zero this register using perip_clk_en0::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for PERIP_CLK_EN0_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for PERIP_CLK_EN0_SPEC

reset() method sets PERIP_CLK_EN0 to value 0xf9c1_e06f

const RESET_VALUE: u32 = 4_190_232_687u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for PERIP_CLK_EN0_SPEC

write(|w| ..) method takes perip_clk_en0::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for PERIP_CLK_EN0_SPEC

read() method returns perip_clk_en0::R reader structure