Module esp32c3::spi2::cmd

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Expand description

Command control register

Structs

  • CMD_SPEC
    Command control register
  • R
    Register CMD reader
  • W
    Register CMD writer

Type Definitions

  • CONF_BITLEN_R
    Field CONF_BITLEN reader - Define the APB cycles of SPI_CONF state. Can be configured in CONF state.
  • CONF_BITLEN_W
    Field CONF_BITLEN writer - Define the APB cycles of SPI_CONF state. Can be configured in CONF state.
  • UPDATE_R
    Field UPDATE reader - Set this bit to synchronize SPI registers from APB clock domain into SPI module clock domain, which is only used in SPI master mode.
  • UPDATE_W
    Field UPDATE writer - Set this bit to synchronize SPI registers from APB clock domain into SPI module clock domain, which is only used in SPI master mode.
  • USR_R
    Field USR reader - User define command enable. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. Can not be changed by CONF_buf.
  • USR_W
    Field USR writer - User define command enable. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. Can not be changed by CONF_buf.