Expand description
Command control register
Structs§
- CMD_
SPEC - Command control register
Type Aliases§
- CONF_
BITLEN_ R - Field
CONF_BITLEN
reader - Define the APB cycles of SPI_CONF state. Can be configured in CONF state. - CONF_
BITLEN_ W - Field
CONF_BITLEN
writer - Define the APB cycles of SPI_CONF state. Can be configured in CONF state. - R
- Register
CMD
reader - UPDATE_
R - Field
UPDATE
reader - Set this bit to synchronize SPI registers from APB clock domain into SPI module clock domain, which is only used in SPI master mode. - UPDATE_
W - Field
UPDATE
writer - Set this bit to synchronize SPI registers from APB clock domain into SPI module clock domain, which is only used in SPI master mode. - USR_R
- Field
USR
reader - User define command enable. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. Can not be changed by CONF_buf. - USR_W
- Field
USR
writer - User define command enable. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. Can not be changed by CONF_buf. - W
- Register
CMD
writer