Struct esp32c3::spi1::flash_sus_ctrl::W

pub struct W(_);

Register FLASH_SUS_CTRL writer

Implementations

impl W

pub fn flash_per(&mut self) -> FLASH_PER_W<'_, 0>

Bit 0 - program erase resume bit, program erase suspend operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_pes(&mut self) -> FLASH_PES_W<'_, 1>

Bit 1 - program erase suspend bit, program erase suspend operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_per_wait_en(&mut self) -> FLASH_PER_WAIT_EN_W<'_, 2>

Bit 2 - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4 or *128) SPI_CLK cycles after program erase resume command is sent. 0: SPI1 does not wait after program erase resume command is sent.

pub fn flash_pes_wait_en(&mut self) -> FLASH_PES_WAIT_EN_W<'_, 3>

Bit 3 - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4 or *128) SPI_CLK cycles after program erase suspend command is sent. 0: SPI1 does not wait after program erase suspend command is sent.

pub fn pes_per_en(&mut self) -> PES_PER_EN_W<'_, 4>

Bit 4 - Set this bit to enable PES end triggers PER transfer option. If this bit is 0, application should send PER after PES is done.

pub fn flash_pes_en(&mut self) -> FLASH_PES_EN_W<'_, 5>

Bit 5 - Set this bit to enable Auto-suspending function.

pub fn pesr_end_msk(&mut self) -> PESR_END_MSK_W<'_, 6>

Bits 6:21 - The mask value when check SUS/SUS1/SUS2 status bit. If the read status value is status_in[15:0](only status_in[7:0] is valid when only one byte of data is read out, status_in[15:0] is valid when two bytes of data are read out), SUS/SUS1/SUS2 = status_in[15:0]^ SPI_MEM_PESR_END_MSK[15:0].

pub fn rd_sus_2b(&mut self) -> RD_SUS_2B_W<'_, 22>

Bit 22 - 1: Read two bytes when check flash SUS/SUS1/SUS2 status bit. 0: Read one byte when check flash SUS/SUS1/SUS2 status bit

pub fn per_end_en(&mut self) -> PER_END_EN_W<'_, 23>

Bit 23 - 1: Both WIP and SUS/SUS1/SUS2 bits should be checked to insure the resume status of flash. 0: Only need to check WIP is 0.

pub fn pes_end_en(&mut self) -> PES_END_EN_W<'_, 24>

Bit 24 - 1: Both WIP and SUS/SUS1/SUS2 bits should be checked to insure the suspend status of flash. 0: Only need to check WIP is 0.

pub fn sus_timeout_cnt(&mut self) -> SUS_TIMEOUT_CNT_W<'_, 25>

Bits 25:31 - When SPI1 checks SUS/SUS1/SUS2 bits fail for SPI_MEM_SUS_TIMEOUT_CNT[6:0] times, it will be treated as check pass.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<FLASH_SUS_CTRL_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<FLASH_SUS_CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<FLASH_SUS_CTRL_SPEC>> for W

fn from(writer: W<FLASH_SUS_CTRL_SPEC>) -> Self

Converts to this type from the input type.