Module esp32c3::extmem::icache_ctrl1

source ·
Expand description

This description will be updated in the near future.

Structs

ICACHE_CTRL1_SPEC
This description will be updated in the near future.
R
Register ICACHE_CTRL1 reader
W
Register ICACHE_CTRL1 writer

Type Definitions

ICACHE_SHUT_DBUS_R
Field ICACHE_SHUT_DBUS reader - The bit is used to disable core1 ibus, 0: enable, 1: disable
ICACHE_SHUT_DBUS_W
Field ICACHE_SHUT_DBUS writer - The bit is used to disable core1 ibus, 0: enable, 1: disable
ICACHE_SHUT_IBUS_R
Field ICACHE_SHUT_IBUS reader - The bit is used to disable core0 ibus, 0: enable, 1: disable
ICACHE_SHUT_IBUS_W
Field ICACHE_SHUT_IBUS writer - The bit is used to disable core0 ibus, 0: enable, 1: disable