1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156

#[doc = "Reader of register RMT_CH3CONF0"]
pub type R = crate::R<u32, super::RMT_CH3CONF0>;
#[doc = "Writer for register RMT_CH3CONF0"]
pub type W = crate::W<u32, super::RMT_CH3CONF0>;
#[doc = "Register RMT_CH3CONF0 `reset()`'s with value 0"]
impl crate::ResetValue for super::RMT_CH3CONF0 {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `RMT_CARRIER_OUT_LV_CH3`"]
pub type RMT_CARRIER_OUT_LV_CH3_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RMT_CARRIER_OUT_LV_CH3`"]
pub struct RMT_CARRIER_OUT_LV_CH3_W<'a> {
    w: &'a mut W,
}
impl<'a> RMT_CARRIER_OUT_LV_CH3_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
        self.w
    }
}
#[doc = "Reader of field `RMT_CARRIER_EN_CH3`"]
pub type RMT_CARRIER_EN_CH3_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RMT_CARRIER_EN_CH3`"]
pub struct RMT_CARRIER_EN_CH3_W<'a> {
    w: &'a mut W,
}
impl<'a> RMT_CARRIER_EN_CH3_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
        self.w
    }
}
#[doc = "Reader of field `RMT_MEM_SIZE_CH3`"]
pub type RMT_MEM_SIZE_CH3_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RMT_MEM_SIZE_CH3`"]
pub struct RMT_MEM_SIZE_CH3_W<'a> {
    w: &'a mut W,
}
impl<'a> RMT_MEM_SIZE_CH3_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x07 << 23)) | (((value as u32) & 0x07) << 23);
        self.w
    }
}
#[doc = "Reader of field `RMT_IDLE_THRES_CH3`"]
pub type RMT_IDLE_THRES_CH3_R = crate::R<u16, u16>;
#[doc = "Write proxy for field `RMT_IDLE_THRES_CH3`"]
pub struct RMT_IDLE_THRES_CH3_W<'a> {
    w: &'a mut W,
}
impl<'a> RMT_IDLE_THRES_CH3_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x7fff << 8)) | (((value as u32) & 0x7fff) << 8);
        self.w
    }
}
#[doc = "Reader of field `RMT_DIV_CNT_CH3`"]
pub type RMT_DIV_CNT_CH3_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RMT_DIV_CNT_CH3`"]
pub struct RMT_DIV_CNT_CH3_W<'a> {
    w: &'a mut W,
}
impl<'a> RMT_DIV_CNT_CH3_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
        self.w
    }
}
impl R {
    #[doc = "Bit 29"]
    #[inline(always)]
    pub fn rmt_carrier_out_lv_ch3(&self) -> RMT_CARRIER_OUT_LV_CH3_R {
        RMT_CARRIER_OUT_LV_CH3_R::new(((self.bits >> 29) & 0x01) != 0)
    }
    #[doc = "Bit 28"]
    #[inline(always)]
    pub fn rmt_carrier_en_ch3(&self) -> RMT_CARRIER_EN_CH3_R {
        RMT_CARRIER_EN_CH3_R::new(((self.bits >> 28) & 0x01) != 0)
    }
    #[doc = "Bits 23:25"]
    #[inline(always)]
    pub fn rmt_mem_size_ch3(&self) -> RMT_MEM_SIZE_CH3_R {
        RMT_MEM_SIZE_CH3_R::new(((self.bits >> 23) & 0x07) as u8)
    }
    #[doc = "Bits 8:22"]
    #[inline(always)]
    pub fn rmt_idle_thres_ch3(&self) -> RMT_IDLE_THRES_CH3_R {
        RMT_IDLE_THRES_CH3_R::new(((self.bits >> 8) & 0x7fff) as u16)
    }
    #[doc = "Bits 0:7"]
    #[inline(always)]
    pub fn rmt_div_cnt_ch3(&self) -> RMT_DIV_CNT_CH3_R {
        RMT_DIV_CNT_CH3_R::new((self.bits & 0xff) as u8)
    }
}
impl W {
    #[doc = "Bit 29"]
    #[inline(always)]
    pub fn rmt_carrier_out_lv_ch3(&mut self) -> RMT_CARRIER_OUT_LV_CH3_W {
        RMT_CARRIER_OUT_LV_CH3_W { w: self }
    }
    #[doc = "Bit 28"]
    #[inline(always)]
    pub fn rmt_carrier_en_ch3(&mut self) -> RMT_CARRIER_EN_CH3_W {
        RMT_CARRIER_EN_CH3_W { w: self }
    }
    #[doc = "Bits 23:25"]
    #[inline(always)]
    pub fn rmt_mem_size_ch3(&mut self) -> RMT_MEM_SIZE_CH3_W {
        RMT_MEM_SIZE_CH3_W { w: self }
    }
    #[doc = "Bits 8:22"]
    #[inline(always)]
    pub fn rmt_idle_thres_ch3(&mut self) -> RMT_IDLE_THRES_CH3_W {
        RMT_IDLE_THRES_CH3_W { w: self }
    }
    #[doc = "Bits 0:7"]
    #[inline(always)]
    pub fn rmt_div_cnt_ch3(&mut self) -> RMT_DIV_CNT_CH3_W {
        RMT_DIV_CNT_CH3_W { w: self }
    }
}