1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
#[doc = "Reader of register I2S_RX_TIMING"]
pub type R = crate::R<u32, super::I2S_RX_TIMING>;
#[doc = "Writer for register I2S_RX_TIMING"]
pub type W = crate::W<u32, super::I2S_RX_TIMING>;
#[doc = "Register I2S_RX_TIMING `reset()`'s with value 0"]
impl crate::ResetValue for super::I2S_RX_TIMING {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `I2S_RX_BCK_IN_DM`"]
pub type I2S_RX_BCK_IN_DM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `I2S_RX_BCK_IN_DM`"]
pub struct I2S_RX_BCK_IN_DM_W<'a> {
    w: &'a mut W,
}
impl<'a> I2S_RX_BCK_IN_DM_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 28)) | (((value as u32) & 0x03) << 28);
        self.w
    }
}
#[doc = "Reader of field `I2S_RX_WS_IN_DM`"]
pub type I2S_RX_WS_IN_DM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `I2S_RX_WS_IN_DM`"]
pub struct I2S_RX_WS_IN_DM_W<'a> {
    w: &'a mut W,
}
impl<'a> I2S_RX_WS_IN_DM_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 24)) | (((value as u32) & 0x03) << 24);
        self.w
    }
}
#[doc = "Reader of field `I2S_RX_BCK_OUT_DM`"]
pub type I2S_RX_BCK_OUT_DM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `I2S_RX_BCK_OUT_DM`"]
pub struct I2S_RX_BCK_OUT_DM_W<'a> {
    w: &'a mut W,
}
impl<'a> I2S_RX_BCK_OUT_DM_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 20)) | (((value as u32) & 0x03) << 20);
        self.w
    }
}
#[doc = "Reader of field `I2S_RX_WS_OUT_DM`"]
pub type I2S_RX_WS_OUT_DM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `I2S_RX_WS_OUT_DM`"]
pub struct I2S_RX_WS_OUT_DM_W<'a> {
    w: &'a mut W,
}
impl<'a> I2S_RX_WS_OUT_DM_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 16)) | (((value as u32) & 0x03) << 16);
        self.w
    }
}
#[doc = "Reader of field `I2S_RX_SD_IN_DM`"]
pub type I2S_RX_SD_IN_DM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `I2S_RX_SD_IN_DM`"]
pub struct I2S_RX_SD_IN_DM_W<'a> {
    w: &'a mut W,
}
impl<'a> I2S_RX_SD_IN_DM_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
        self.w
    }
}
impl R {
    #[doc = "Bits 28:29"]
    #[inline(always)]
    pub fn i2s_rx_bck_in_dm(&self) -> I2S_RX_BCK_IN_DM_R {
        I2S_RX_BCK_IN_DM_R::new(((self.bits >> 28) & 0x03) as u8)
    }
    #[doc = "Bits 24:25"]
    #[inline(always)]
    pub fn i2s_rx_ws_in_dm(&self) -> I2S_RX_WS_IN_DM_R {
        I2S_RX_WS_IN_DM_R::new(((self.bits >> 24) & 0x03) as u8)
    }
    #[doc = "Bits 20:21"]
    #[inline(always)]
    pub fn i2s_rx_bck_out_dm(&self) -> I2S_RX_BCK_OUT_DM_R {
        I2S_RX_BCK_OUT_DM_R::new(((self.bits >> 20) & 0x03) as u8)
    }
    #[doc = "Bits 16:17"]
    #[inline(always)]
    pub fn i2s_rx_ws_out_dm(&self) -> I2S_RX_WS_OUT_DM_R {
        I2S_RX_WS_OUT_DM_R::new(((self.bits >> 16) & 0x03) as u8)
    }
    #[doc = "Bits 0:1"]
    #[inline(always)]
    pub fn i2s_rx_sd_in_dm(&self) -> I2S_RX_SD_IN_DM_R {
        I2S_RX_SD_IN_DM_R::new((self.bits & 0x03) as u8)
    }
}
impl W {
    #[doc = "Bits 28:29"]
    #[inline(always)]
    pub fn i2s_rx_bck_in_dm(&mut self) -> I2S_RX_BCK_IN_DM_W {
        I2S_RX_BCK_IN_DM_W { w: self }
    }
    #[doc = "Bits 24:25"]
    #[inline(always)]
    pub fn i2s_rx_ws_in_dm(&mut self) -> I2S_RX_WS_IN_DM_W {
        I2S_RX_WS_IN_DM_W { w: self }
    }
    #[doc = "Bits 20:21"]
    #[inline(always)]
    pub fn i2s_rx_bck_out_dm(&mut self) -> I2S_RX_BCK_OUT_DM_W {
        I2S_RX_BCK_OUT_DM_W { w: self }
    }
    #[doc = "Bits 16:17"]
    #[inline(always)]
    pub fn i2s_rx_ws_out_dm(&mut self) -> I2S_RX_WS_OUT_DM_W {
        I2S_RX_WS_OUT_DM_W { w: self }
    }
    #[doc = "Bits 0:1"]
    #[inline(always)]
    pub fn i2s_rx_sd_in_dm(&mut self) -> I2S_RX_SD_IN_DM_W {
        I2S_RX_SD_IN_DM_W { w: self }
    }
}