Struct esp32c3::gdma::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub dma_int_raw_ch0: DMA_INT_RAW_CH0,
    pub dma_int_st_ch0: DMA_INT_ST_CH0,
    pub dma_int_ena_ch0: DMA_INT_ENA_CH0,
    pub dma_int_clr_ch0: DMA_INT_CLR_CH0,
    pub dma_int_raw_ch1: DMA_INT_RAW_CH1,
    pub dma_int_st_ch1: DMA_INT_ST_CH1,
    pub dma_int_ena_ch1: DMA_INT_ENA_CH1,
    pub dma_int_clr_ch1: DMA_INT_CLR_CH1,
    pub dma_int_raw_ch2: DMA_INT_RAW_CH2,
    pub dma_int_st_ch2: DMA_INT_ST_CH2,
    pub dma_int_ena_ch2: DMA_INT_ENA_CH2,
    pub dma_int_clr_ch2: DMA_INT_CLR_CH2,
    pub dma_ahb_test: DMA_AHB_TEST,
    pub dma_misc_conf: DMA_MISC_CONF,
    pub dma_date: DMA_DATE,
    pub dma_in_conf0_ch0: DMA_IN_CONF0_CH0,
    pub dma_in_conf1_ch0: DMA_IN_CONF1_CH0,
    pub dma_infifo_status_ch0: DMA_INFIFO_STATUS_CH0,
    pub dma_in_pop_ch0: DMA_IN_POP_CH0,
    pub dma_in_link_ch0: DMA_IN_LINK_CH0,
    pub dma_in_state_ch0: DMA_IN_STATE_CH0,
    pub dma_in_suc_eof_des_addr_ch0: DMA_IN_SUC_EOF_DES_ADDR_CH0,
    pub dma_in_err_eof_des_addr_ch0: DMA_IN_ERR_EOF_DES_ADDR_CH0,
    pub dma_in_dscr_ch0: DMA_IN_DSCR_CH0,
    pub dma_in_dscr_bf0_ch0: DMA_IN_DSCR_BF0_CH0,
    pub dma_in_dscr_bf1_ch0: DMA_IN_DSCR_BF1_CH0,
    pub dma_in_pri_ch0: DMA_IN_PRI_CH0,
    pub dma_in_peri_sel_ch0: DMA_IN_PERI_SEL_CH0,
    pub dma_out_conf0_ch0: DMA_OUT_CONF0_CH0,
    pub dma_out_conf1_ch0: DMA_OUT_CONF1_CH0,
    pub dma_outfifo_status_ch0: DMA_OUTFIFO_STATUS_CH0,
    pub dma_out_push_ch0: DMA_OUT_PUSH_CH0,
    pub dma_out_link_ch0: DMA_OUT_LINK_CH0,
    pub dma_out_state_ch0: DMA_OUT_STATE_CH0,
    pub dma_out_eof_des_addr_ch0: DMA_OUT_EOF_DES_ADDR_CH0,
    pub dma_out_eof_bfr_des_addr_ch0: DMA_OUT_EOF_BFR_DES_ADDR_CH0,
    pub dma_out_dscr_ch0: DMA_OUT_DSCR_CH0,
    pub dma_out_dscr_bf0_ch0: DMA_OUT_DSCR_BF0_CH0,
    pub dma_out_dscr_bf1_ch0: DMA_OUT_DSCR_BF1_CH0,
    pub dma_out_pri_ch0: DMA_OUT_PRI_CH0,
    pub dma_out_peri_sel_ch0: DMA_OUT_PERI_SEL_CH0,
    pub dma_in_conf0_ch1: DMA_IN_CONF0_CH1,
    pub dma_in_conf1_ch1: DMA_IN_CONF1_CH1,
    pub dma_infifo_status_ch1: DMA_INFIFO_STATUS_CH1,
    pub dma_in_pop_ch1: DMA_IN_POP_CH1,
    pub dma_in_link_ch1: DMA_IN_LINK_CH1,
    pub dma_in_state_ch1: DMA_IN_STATE_CH1,
    pub dma_in_suc_eof_des_addr_ch1: DMA_IN_SUC_EOF_DES_ADDR_CH1,
    pub dma_in_err_eof_des_addr_ch1: DMA_IN_ERR_EOF_DES_ADDR_CH1,
    pub dma_in_dscr_ch1: DMA_IN_DSCR_CH1,
    pub dma_in_dscr_bf0_ch1: DMA_IN_DSCR_BF0_CH1,
    pub dma_in_dscr_bf1_ch1: DMA_IN_DSCR_BF1_CH1,
    pub dma_in_pri_ch1: DMA_IN_PRI_CH1,
    pub dma_in_peri_sel_ch1: DMA_IN_PERI_SEL_CH1,
    pub dma_out_conf0_ch1: DMA_OUT_CONF0_CH1,
    pub dma_out_conf1_ch1: DMA_OUT_CONF1_CH1,
    pub dma_outfifo_status_ch1: DMA_OUTFIFO_STATUS_CH1,
    pub dma_out_push_ch1: DMA_OUT_PUSH_CH1,
    pub dma_out_link_ch1: DMA_OUT_LINK_CH1,
    pub dma_out_state_ch1: DMA_OUT_STATE_CH1,
    pub dma_out_eof_des_addr_ch1: DMA_OUT_EOF_DES_ADDR_CH1,
    pub dma_out_eof_bfr_des_addr_ch1: DMA_OUT_EOF_BFR_DES_ADDR_CH1,
    pub dma_out_dscr_ch1: DMA_OUT_DSCR_CH1,
    pub dma_out_dscr_bf0_ch1: DMA_OUT_DSCR_BF0_CH1,
    pub dma_out_dscr_bf1_ch1: DMA_OUT_DSCR_BF1_CH1,
    pub dma_out_pri_ch1: DMA_OUT_PRI_CH1,
    pub dma_out_peri_sel_ch1: DMA_OUT_PERI_SEL_CH1,
    pub dma_in_conf0_ch2: DMA_IN_CONF0_CH2,
    pub dma_in_conf1_ch2: DMA_IN_CONF1_CH2,
    pub dma_infifo_status_ch2: DMA_INFIFO_STATUS_CH2,
    pub dma_in_pop_ch2: DMA_IN_POP_CH2,
    pub dma_in_link_ch2: DMA_IN_LINK_CH2,
    pub dma_in_state_ch2: DMA_IN_STATE_CH2,
    pub dma_in_suc_eof_des_addr_ch2: DMA_IN_SUC_EOF_DES_ADDR_CH2,
    pub dma_in_err_eof_des_addr_ch2: DMA_IN_ERR_EOF_DES_ADDR_CH2,
    pub dma_in_dscr_ch2: DMA_IN_DSCR_CH2,
    pub dma_in_dscr_bf0_ch2: DMA_IN_DSCR_BF0_CH2,
    pub dma_in_dscr_bf1_ch2: DMA_IN_DSCR_BF1_CH2,
    pub dma_in_pri_ch2: DMA_IN_PRI_CH2,
    pub dma_in_peri_sel_ch2: DMA_IN_PERI_SEL_CH2,
    pub dma_out_conf0_ch2: DMA_OUT_CONF0_CH2,
    pub dma_out_conf1_ch2: DMA_OUT_CONF1_CH2,
    pub dma_outfifo_status_ch2: DMA_OUTFIFO_STATUS_CH2,
    pub dma_out_push_ch2: DMA_OUT_PUSH_CH2,
    pub dma_out_link_ch2: DMA_OUT_LINK_CH2,
    pub dma_out_state_ch2: DMA_OUT_STATE_CH2,
    pub dma_out_eof_des_addr_ch2: DMA_OUT_EOF_DES_ADDR_CH2,
    pub dma_out_eof_bfr_des_addr_ch2: DMA_OUT_EOF_BFR_DES_ADDR_CH2,
    pub dma_out_dscr_ch2: DMA_OUT_DSCR_CH2,
    pub dma_out_dscr_bf0_ch2: DMA_OUT_DSCR_BF0_CH2,
    pub dma_out_dscr_bf1_ch2: DMA_OUT_DSCR_BF1_CH2,
    pub dma_out_pri_ch2: DMA_OUT_PRI_CH2,
    pub dma_out_peri_sel_ch2: DMA_OUT_PERI_SEL_CH2,
    // some fields omitted
}

Register block

Fields

dma_int_raw_ch0: DMA_INT_RAW_CH0

0x00 - DMA_INT_RAW_CH0

dma_int_st_ch0: DMA_INT_ST_CH0

0x04 - DMA_INT_ST_CH0

dma_int_ena_ch0: DMA_INT_ENA_CH0

0x08 - DMA_INT_ENA_CH0

dma_int_clr_ch0: DMA_INT_CLR_CH0

0x0c - DMA_INT_CLR_CH0

dma_int_raw_ch1: DMA_INT_RAW_CH1

0x10 - DMA_INT_RAW_CH1

dma_int_st_ch1: DMA_INT_ST_CH1

0x14 - DMA_INT_ST_CH1

dma_int_ena_ch1: DMA_INT_ENA_CH1

0x18 - DMA_INT_ENA_CH1

dma_int_clr_ch1: DMA_INT_CLR_CH1

0x1c - DMA_INT_CLR_CH1

dma_int_raw_ch2: DMA_INT_RAW_CH2

0x20 - DMA_INT_RAW_CH2

dma_int_st_ch2: DMA_INT_ST_CH2

0x24 - DMA_INT_ST_CH2

dma_int_ena_ch2: DMA_INT_ENA_CH2

0x28 - DMA_INT_ENA_CH2

dma_int_clr_ch2: DMA_INT_CLR_CH2

0x2c - DMA_INT_CLR_CH2

dma_ahb_test: DMA_AHB_TEST

0x40 - DMA_AHB_TEST

dma_misc_conf: DMA_MISC_CONF

0x44 - DMA_MISC_CONF

dma_date: DMA_DATE

0x48 - DMA_DATE

dma_in_conf0_ch0: DMA_IN_CONF0_CH0

0x70 - DMA_IN_CONF0_CH0

dma_in_conf1_ch0: DMA_IN_CONF1_CH0

0x74 - DMA_IN_CONF1_CH0

dma_infifo_status_ch0: DMA_INFIFO_STATUS_CH0

0x78 - DMA_INFIFO_STATUS_CH0

dma_in_pop_ch0: DMA_IN_POP_CH0

0x7c - DMA_IN_POP_CH0

dma_in_link_ch0: DMA_IN_LINK_CH0

0x80 - DMA_IN_LINK_CH0

dma_in_state_ch0: DMA_IN_STATE_CH0

0x84 - DMA_IN_STATE_CH0

dma_in_suc_eof_des_addr_ch0: DMA_IN_SUC_EOF_DES_ADDR_CH0

0x88 - DMA_IN_SUC_EOF_DES_ADDR_CH0

dma_in_err_eof_des_addr_ch0: DMA_IN_ERR_EOF_DES_ADDR_CH0

0x8c - DMA_IN_ERR_EOF_DES_ADDR_CH0

dma_in_dscr_ch0: DMA_IN_DSCR_CH0

0x90 - DMA_IN_DSCR_CH0

dma_in_dscr_bf0_ch0: DMA_IN_DSCR_BF0_CH0

0x94 - DMA_IN_DSCR_BF0_CH0

dma_in_dscr_bf1_ch0: DMA_IN_DSCR_BF1_CH0

0x98 - DMA_IN_DSCR_BF1_CH0

dma_in_pri_ch0: DMA_IN_PRI_CH0

0x9c - DMA_IN_PRI_CH0

dma_in_peri_sel_ch0: DMA_IN_PERI_SEL_CH0

0xa0 - DMA_IN_PERI_SEL_CH0

dma_out_conf0_ch0: DMA_OUT_CONF0_CH0

0xd0 - DMA_OUT_CONF0_CH0

dma_out_conf1_ch0: DMA_OUT_CONF1_CH0

0xd4 - DMA_OUT_CONF1_CH0

dma_outfifo_status_ch0: DMA_OUTFIFO_STATUS_CH0

0xd8 - DMA_OUTFIFO_STATUS_CH0

dma_out_push_ch0: DMA_OUT_PUSH_CH0

0xdc - DMA_OUT_PUSH_CH0

dma_out_link_ch0: DMA_OUT_LINK_CH0

0xe0 - DMA_OUT_LINK_CH0

dma_out_state_ch0: DMA_OUT_STATE_CH0

0xe4 - DMA_OUT_STATE_CH0

dma_out_eof_des_addr_ch0: DMA_OUT_EOF_DES_ADDR_CH0

0xe8 - DMA_OUT_EOF_DES_ADDR_CH0

dma_out_eof_bfr_des_addr_ch0: DMA_OUT_EOF_BFR_DES_ADDR_CH0

0xec - DMA_OUT_EOF_BFR_DES_ADDR_CH0

dma_out_dscr_ch0: DMA_OUT_DSCR_CH0

0xf0 - DMA_OUT_DSCR_CH0

dma_out_dscr_bf0_ch0: DMA_OUT_DSCR_BF0_CH0

0xf4 - DMA_OUT_DSCR_BF0_CH0

dma_out_dscr_bf1_ch0: DMA_OUT_DSCR_BF1_CH0

0xf8 - DMA_OUT_DSCR_BF1_CH0

dma_out_pri_ch0: DMA_OUT_PRI_CH0

0xfc - DMA_OUT_PRI_CH0

dma_out_peri_sel_ch0: DMA_OUT_PERI_SEL_CH0

0x100 - DMA_OUT_PERI_SEL_CH0

dma_in_conf0_ch1: DMA_IN_CONF0_CH1

0x130 - DMA_IN_CONF0_CH1

dma_in_conf1_ch1: DMA_IN_CONF1_CH1

0x134 - DMA_IN_CONF1_CH1

dma_infifo_status_ch1: DMA_INFIFO_STATUS_CH1

0x138 - DMA_INFIFO_STATUS_CH1

dma_in_pop_ch1: DMA_IN_POP_CH1

0x13c - DMA_IN_POP_CH1

dma_in_link_ch1: DMA_IN_LINK_CH1

0x140 - DMA_IN_LINK_CH1

dma_in_state_ch1: DMA_IN_STATE_CH1

0x144 - DMA_IN_STATE_CH1

dma_in_suc_eof_des_addr_ch1: DMA_IN_SUC_EOF_DES_ADDR_CH1

0x148 - DMA_IN_SUC_EOF_DES_ADDR_CH1

dma_in_err_eof_des_addr_ch1: DMA_IN_ERR_EOF_DES_ADDR_CH1

0x14c - DMA_IN_ERR_EOF_DES_ADDR_CH1

dma_in_dscr_ch1: DMA_IN_DSCR_CH1

0x150 - DMA_IN_DSCR_CH1

dma_in_dscr_bf0_ch1: DMA_IN_DSCR_BF0_CH1

0x154 - DMA_IN_DSCR_BF0_CH1

dma_in_dscr_bf1_ch1: DMA_IN_DSCR_BF1_CH1

0x158 - DMA_IN_DSCR_BF1_CH1

dma_in_pri_ch1: DMA_IN_PRI_CH1

0x15c - DMA_IN_PRI_CH1

dma_in_peri_sel_ch1: DMA_IN_PERI_SEL_CH1

0x160 - DMA_IN_PERI_SEL_CH1

dma_out_conf0_ch1: DMA_OUT_CONF0_CH1

0x190 - DMA_OUT_CONF0_CH1

dma_out_conf1_ch1: DMA_OUT_CONF1_CH1

0x194 - DMA_OUT_CONF1_CH1

dma_outfifo_status_ch1: DMA_OUTFIFO_STATUS_CH1

0x198 - DMA_OUTFIFO_STATUS_CH1

dma_out_push_ch1: DMA_OUT_PUSH_CH1

0x19c - DMA_OUT_PUSH_CH1

dma_out_link_ch1: DMA_OUT_LINK_CH1

0x1a0 - DMA_OUT_LINK_CH1

dma_out_state_ch1: DMA_OUT_STATE_CH1

0x1a4 - DMA_OUT_STATE_CH1

dma_out_eof_des_addr_ch1: DMA_OUT_EOF_DES_ADDR_CH1

0x1a8 - DMA_OUT_EOF_DES_ADDR_CH1

dma_out_eof_bfr_des_addr_ch1: DMA_OUT_EOF_BFR_DES_ADDR_CH1

0x1ac - DMA_OUT_EOF_BFR_DES_ADDR_CH1

dma_out_dscr_ch1: DMA_OUT_DSCR_CH1

0x1b0 - DMA_OUT_DSCR_CH1

dma_out_dscr_bf0_ch1: DMA_OUT_DSCR_BF0_CH1

0x1b4 - DMA_OUT_DSCR_BF0_CH1

dma_out_dscr_bf1_ch1: DMA_OUT_DSCR_BF1_CH1

0x1b8 - DMA_OUT_DSCR_BF1_CH1

dma_out_pri_ch1: DMA_OUT_PRI_CH1

0x1bc - DMA_OUT_PRI_CH1

dma_out_peri_sel_ch1: DMA_OUT_PERI_SEL_CH1

0x1c0 - DMA_OUT_PERI_SEL_CH1

dma_in_conf0_ch2: DMA_IN_CONF0_CH2

0x1f0 - DMA_IN_CONF0_CH2

dma_in_conf1_ch2: DMA_IN_CONF1_CH2

0x1f4 - DMA_IN_CONF1_CH2

dma_infifo_status_ch2: DMA_INFIFO_STATUS_CH2

0x1f8 - DMA_INFIFO_STATUS_CH2

dma_in_pop_ch2: DMA_IN_POP_CH2

0x1fc - DMA_IN_POP_CH2

dma_in_link_ch2: DMA_IN_LINK_CH2

0x200 - DMA_IN_LINK_CH2

dma_in_state_ch2: DMA_IN_STATE_CH2

0x204 - DMA_IN_STATE_CH2

dma_in_suc_eof_des_addr_ch2: DMA_IN_SUC_EOF_DES_ADDR_CH2

0x208 - DMA_IN_SUC_EOF_DES_ADDR_CH2

dma_in_err_eof_des_addr_ch2: DMA_IN_ERR_EOF_DES_ADDR_CH2

0x20c - DMA_IN_ERR_EOF_DES_ADDR_CH2

dma_in_dscr_ch2: DMA_IN_DSCR_CH2

0x210 - DMA_IN_DSCR_CH2

dma_in_dscr_bf0_ch2: DMA_IN_DSCR_BF0_CH2

0x214 - DMA_IN_DSCR_BF0_CH2

dma_in_dscr_bf1_ch2: DMA_IN_DSCR_BF1_CH2

0x218 - DMA_IN_DSCR_BF1_CH2

dma_in_pri_ch2: DMA_IN_PRI_CH2

0x21c - DMA_IN_PRI_CH2

dma_in_peri_sel_ch2: DMA_IN_PERI_SEL_CH2

0x220 - DMA_IN_PERI_SEL_CH2

dma_out_conf0_ch2: DMA_OUT_CONF0_CH2

0x250 - DMA_OUT_CONF0_CH2

dma_out_conf1_ch2: DMA_OUT_CONF1_CH2

0x254 - DMA_OUT_CONF1_CH2

dma_outfifo_status_ch2: DMA_OUTFIFO_STATUS_CH2

0x258 - DMA_OUTFIFO_STATUS_CH2

dma_out_push_ch2: DMA_OUT_PUSH_CH2

0x25c - DMA_OUT_PUSH_CH2

dma_out_link_ch2: DMA_OUT_LINK_CH2

0x260 - DMA_OUT_LINK_CH2

dma_out_state_ch2: DMA_OUT_STATE_CH2

0x264 - DMA_OUT_STATE_CH2

dma_out_eof_des_addr_ch2: DMA_OUT_EOF_DES_ADDR_CH2

0x268 - DMA_OUT_EOF_DES_ADDR_CH2

dma_out_eof_bfr_des_addr_ch2: DMA_OUT_EOF_BFR_DES_ADDR_CH2

0x26c - DMA_OUT_EOF_BFR_DES_ADDR_CH2

dma_out_dscr_ch2: DMA_OUT_DSCR_CH2

0x270 - DMA_OUT_DSCR_CH2

dma_out_dscr_bf0_ch2: DMA_OUT_DSCR_BF0_CH2

0x274 - DMA_OUT_DSCR_BF0_CH2

dma_out_dscr_bf1_ch2: DMA_OUT_DSCR_BF1_CH2

0x278 - DMA_OUT_DSCR_BF1_CH2

dma_out_pri_ch2: DMA_OUT_PRI_CH2

0x27c - DMA_OUT_PRI_CH2

dma_out_peri_sel_ch2: DMA_OUT_PERI_SEL_CH2

0x280 - DMA_OUT_PERI_SEL_CH2

Auto Trait Implementations

`impl Send for RegisterBlock`[src]

`impl !Sync for RegisterBlock`[src]

`impl Unpin for RegisterBlock`[src]

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

Struct esp32c3::gdma::RegisterBlock[−][src]

Fields

Auto Trait Implementations

`impl Send for RegisterBlock`[src]

`impl !Sync for RegisterBlock`[src]

`impl Unpin for RegisterBlock`[src]

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into<U> for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T, U> TryFrom<U> for T where U: Into<T>,` [src]

`type Error = Infallible`

`pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>`[src]

`impl<T, U> TryInto<U> for T where U: TryFrom<T>,` [src]

`type Error = <U as TryFrom<T>>::Error`

`pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>`[src]

Struct esp32c3::gdma::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl Send for RegisterBlock[src]

impl !Sync for RegisterBlock[src]

impl Unpin for RegisterBlock[src]

Blanket Implementations

impl<T> Any for T where T: 'static + ?Sized, [src]

pub fn type_id(&self) -> TypeId[src]

impl<T> Borrow<T> for T where T: ?Sized, [src]

pub fn borrow(&self) -> &T[src]

impl<T> BorrowMut<T> for T where T: ?Sized, [src]

pub fn borrow_mut(&mut self) -> &mut T[src]

impl<T> From<T> for T[src]

pub fn from(t: T) -> T[src]

impl<T, U> Into<U> for T where U: From<T>, [src]

pub fn into(self) -> U[src]

impl<T, U> TryFrom<U> for T where U: Into<T>, [src]

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]

impl<T, U> TryInto<U> for T where U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>[src]

`impl Send for RegisterBlock`[src]

`impl !Sync for RegisterBlock`[src]

`impl Unpin for RegisterBlock`[src]

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into<U> for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T, U> TryFrom<U> for T where U: Into<T>,` [src]

`type Error = Infallible`

`pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>`[src]

`impl<T, U> TryInto<U> for T where U: TryFrom<T>,` [src]

`type Error = <U as TryFrom<T>>::Error`

`pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>`[src]