Module esp32c3::extmem [−][src]
EXTMEM
Modules
| extmem_cache_acs_cnt_clr | EXTMEM_CACHE_ACS_CNT_CLR |
| extmem_cache_conf_misc | EXTMEM_CACHE_CONF_MISC |
| extmem_cache_encrypt_decrypt_clk_force_on | EXTMEM_CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON |
| extmem_cache_encrypt_decrypt_record_disable | EXTMEM_CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE |
| extmem_cache_ilg_int_clr | EXTMEM_CACHE_ILG_INT_CLR |
| extmem_cache_ilg_int_ena | EXTMEM_CACHE_ILG_INT_ENA |
| extmem_cache_ilg_int_st | EXTMEM_CACHE_ILG_INT_ST |
| extmem_cache_mmu_fault_content | EXTMEM_CACHE_MMU_FAULT_CONTENT |
| extmem_cache_mmu_fault_vaddr | EXTMEM_CACHE_MMU_FAULT_VADDR |
| extmem_cache_mmu_owner | EXTMEM_CACHE_MMU_OWNER |
| extmem_cache_mmu_power_ctrl | EXTMEM_CACHE_MMU_POWER_CTRL |
| extmem_cache_preload_int_ctrl | EXTMEM_CACHE_PRELOAD_INT_CTRL |
| extmem_cache_request | EXTMEM_CACHE_REQUEST |
| extmem_cache_state | EXTMEM_CACHE_STATE |
| extmem_cache_sync_int_ctrl | EXTMEM_CACHE_SYNC_INT_CTRL |
| extmem_cache_wrap_around_ctrl | EXTMEM_CACHE_WRAP_AROUND_CTRL |
| extmem_clock_gate | EXTMEM_CLOCK_GATE |
| extmem_core0_acs_cache_int_clr | EXTMEM_CORE0_ACS_CACHE_INT_CLR |
| extmem_core0_acs_cache_int_ena | EXTMEM_CORE0_ACS_CACHE_INT_ENA |
| extmem_core0_acs_cache_int_st | EXTMEM_CORE0_ACS_CACHE_INT_ST |
| extmem_core0_dbus_reject_st | EXTMEM_CORE0_DBUS_REJECT_ST |
| extmem_core0_dbus_reject_vaddr | EXTMEM_CORE0_DBUS_REJECT_VADDR |
| extmem_core0_ibus_reject_st | EXTMEM_CORE0_IBUS_REJECT_ST |
| extmem_core0_ibus_reject_vaddr | EXTMEM_CORE0_IBUS_REJECT_VADDR |
| extmem_date | EXTMEM_DATE |
| extmem_dbus_acs_cnt | EXTMEM_DBUS_ACS_CNT |
| extmem_dbus_acs_flash_miss_cnt | EXTMEM_DBUS_ACS_FLASH_MISS_CNT |
| extmem_dbus_pms_tbl_attr | EXTMEM_DBUS_PMS_TBL_ATTR |
| extmem_dbus_pms_tbl_boundary0 | EXTMEM_DBUS_PMS_TBL_BOUNDARY0 |
| extmem_dbus_pms_tbl_boundary1 | EXTMEM_DBUS_PMS_TBL_BOUNDARY1 |
| extmem_dbus_pms_tbl_boundary2 | EXTMEM_DBUS_PMS_TBL_BOUNDARY2 |
| extmem_dbus_pms_tbl_lock | EXTMEM_DBUS_PMS_TBL_LOCK |
| extmem_dbus_to_flash_end_vaddr | EXTMEM_DBUS_TO_FLASH_END_VADDR |
| extmem_dbus_to_flash_start_vaddr | EXTMEM_DBUS_TO_FLASH_START_VADDR |
| extmem_ibus_acs_cnt | EXTMEM_IBUS_ACS_CNT |
| extmem_ibus_acs_miss_cnt | EXTMEM_IBUS_ACS_MISS_CNT |
| extmem_ibus_pms_tbl_attr | EXTMEM_IBUS_PMS_TBL_ATTR |
| extmem_ibus_pms_tbl_boundary0 | EXTMEM_IBUS_PMS_TBL_BOUNDARY0 |
| extmem_ibus_pms_tbl_boundary1 | EXTMEM_IBUS_PMS_TBL_BOUNDARY1 |
| extmem_ibus_pms_tbl_boundary2 | EXTMEM_IBUS_PMS_TBL_BOUNDARY2 |
| extmem_ibus_pms_tbl_lock | EXTMEM_IBUS_PMS_TBL_LOCK |
| extmem_ibus_to_flash_end_vaddr | EXTMEM_IBUS_TO_FLASH_END_VADDR |
| extmem_ibus_to_flash_start_vaddr | EXTMEM_IBUS_TO_FLASH_START_VADDR |
| extmem_icache_atomic_operate_ena | EXTMEM_ICACHE_ATOMIC_OPERATE_ENA |
| extmem_icache_autoload_ctrl | EXTMEM_ICACHE_AUTOLOAD_CTRL |
| extmem_icache_autoload_sct0_addr | EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR |
| extmem_icache_autoload_sct0_size | EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE |
| extmem_icache_autoload_sct1_addr | EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR |
| extmem_icache_autoload_sct1_size | EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE |
| extmem_icache_ctrl | EXTMEM_ICACHE_CTRL |
| extmem_icache_ctrl1 | EXTMEM_ICACHE_CTRL1 |
| extmem_icache_freeze | EXTMEM_ICACHE_FREEZE |
| extmem_icache_lock_addr | EXTMEM_ICACHE_LOCK_ADDR |
| extmem_icache_lock_ctrl | EXTMEM_ICACHE_LOCK_CTRL |
| extmem_icache_lock_size | EXTMEM_ICACHE_LOCK_SIZE |
| extmem_icache_preload_addr | EXTMEM_ICACHE_PRELOAD_ADDR |
| extmem_icache_preload_ctrl | EXTMEM_ICACHE_PRELOAD_CTRL |
| extmem_icache_preload_size | EXTMEM_ICACHE_PRELOAD_SIZE |
| extmem_icache_prelock_ctrl | EXTMEM_ICACHE_PRELOCK_CTRL |
| extmem_icache_prelock_sct0_addr | EXTMEM_ICACHE_PRELOCK_SCT0_ADDR |
| extmem_icache_prelock_sct1_addr | EXTMEM_ICACHE_PRELOCK_SCT1_ADDR |
| extmem_icache_prelock_sct_size | EXTMEM_ICACHE_PRELOCK_SCT_SIZE |
| extmem_icache_sync_addr | EXTMEM_ICACHE_SYNC_ADDR |
| extmem_icache_sync_ctrl | EXTMEM_ICACHE_SYNC_CTRL |
| extmem_icache_sync_size | EXTMEM_ICACHE_SYNC_SIZE |
| extmem_icache_tag_power_ctrl | EXTMEM_ICACHE_TAG_POWER_CTRL |
Structs
| RegisterBlock | Register block |
Type Definitions
| EXTMEM_CACHE_ACS_CNT_CLR | EXTMEM_CACHE_ACS_CNT_CLR |
| EXTMEM_CACHE_CONF_MISC | EXTMEM_CACHE_CONF_MISC |
| EXTMEM_CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON | EXTMEM_CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON |
| EXTMEM_CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE | EXTMEM_CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE |
| EXTMEM_CACHE_ILG_INT_CLR | EXTMEM_CACHE_ILG_INT_CLR |
| EXTMEM_CACHE_ILG_INT_ENA | EXTMEM_CACHE_ILG_INT_ENA |
| EXTMEM_CACHE_ILG_INT_ST | EXTMEM_CACHE_ILG_INT_ST |
| EXTMEM_CACHE_MMU_FAULT_CONTENT | EXTMEM_CACHE_MMU_FAULT_CONTENT |
| EXTMEM_CACHE_MMU_FAULT_VADDR | EXTMEM_CACHE_MMU_FAULT_VADDR |
| EXTMEM_CACHE_MMU_OWNER | EXTMEM_CACHE_MMU_OWNER |
| EXTMEM_CACHE_MMU_POWER_CTRL | EXTMEM_CACHE_MMU_POWER_CTRL |
| EXTMEM_CACHE_PRELOAD_INT_CTRL | EXTMEM_CACHE_PRELOAD_INT_CTRL |
| EXTMEM_CACHE_REQUEST | EXTMEM_CACHE_REQUEST |
| EXTMEM_CACHE_STATE | EXTMEM_CACHE_STATE |
| EXTMEM_CACHE_SYNC_INT_CTRL | EXTMEM_CACHE_SYNC_INT_CTRL |
| EXTMEM_CACHE_WRAP_AROUND_CTRL | EXTMEM_CACHE_WRAP_AROUND_CTRL |
| EXTMEM_CLOCK_GATE | EXTMEM_CLOCK_GATE |
| EXTMEM_CORE0_ACS_CACHE_INT_CLR | EXTMEM_CORE0_ACS_CACHE_INT_CLR |
| EXTMEM_CORE0_ACS_CACHE_INT_ENA | EXTMEM_CORE0_ACS_CACHE_INT_ENA |
| EXTMEM_CORE0_ACS_CACHE_INT_ST | EXTMEM_CORE0_ACS_CACHE_INT_ST |
| EXTMEM_CORE0_DBUS_REJECT_ST | EXTMEM_CORE0_DBUS_REJECT_ST |
| EXTMEM_CORE0_DBUS_REJECT_VADDR | EXTMEM_CORE0_DBUS_REJECT_VADDR |
| EXTMEM_CORE0_IBUS_REJECT_ST | EXTMEM_CORE0_IBUS_REJECT_ST |
| EXTMEM_CORE0_IBUS_REJECT_VADDR | EXTMEM_CORE0_IBUS_REJECT_VADDR |
| EXTMEM_DATE | EXTMEM_DATE |
| EXTMEM_DBUS_ACS_CNT | EXTMEM_DBUS_ACS_CNT |
| EXTMEM_DBUS_ACS_FLASH_MISS_CNT | EXTMEM_DBUS_ACS_FLASH_MISS_CNT |
| EXTMEM_DBUS_PMS_TBL_ATTR | EXTMEM_DBUS_PMS_TBL_ATTR |
| EXTMEM_DBUS_PMS_TBL_BOUNDARY0 | EXTMEM_DBUS_PMS_TBL_BOUNDARY0 |
| EXTMEM_DBUS_PMS_TBL_BOUNDARY1 | EXTMEM_DBUS_PMS_TBL_BOUNDARY1 |
| EXTMEM_DBUS_PMS_TBL_BOUNDARY2 | EXTMEM_DBUS_PMS_TBL_BOUNDARY2 |
| EXTMEM_DBUS_PMS_TBL_LOCK | EXTMEM_DBUS_PMS_TBL_LOCK |
| EXTMEM_DBUS_TO_FLASH_END_VADDR | EXTMEM_DBUS_TO_FLASH_END_VADDR |
| EXTMEM_DBUS_TO_FLASH_START_VADDR | EXTMEM_DBUS_TO_FLASH_START_VADDR |
| EXTMEM_IBUS_ACS_CNT | EXTMEM_IBUS_ACS_CNT |
| EXTMEM_IBUS_ACS_MISS_CNT | EXTMEM_IBUS_ACS_MISS_CNT |
| EXTMEM_IBUS_PMS_TBL_ATTR | EXTMEM_IBUS_PMS_TBL_ATTR |
| EXTMEM_IBUS_PMS_TBL_BOUNDARY0 | EXTMEM_IBUS_PMS_TBL_BOUNDARY0 |
| EXTMEM_IBUS_PMS_TBL_BOUNDARY1 | EXTMEM_IBUS_PMS_TBL_BOUNDARY1 |
| EXTMEM_IBUS_PMS_TBL_BOUNDARY2 | EXTMEM_IBUS_PMS_TBL_BOUNDARY2 |
| EXTMEM_IBUS_PMS_TBL_LOCK | EXTMEM_IBUS_PMS_TBL_LOCK |
| EXTMEM_IBUS_TO_FLASH_END_VADDR | EXTMEM_IBUS_TO_FLASH_END_VADDR |
| EXTMEM_IBUS_TO_FLASH_START_VADDR | EXTMEM_IBUS_TO_FLASH_START_VADDR |
| EXTMEM_ICACHE_ATOMIC_OPERATE_ENA | EXTMEM_ICACHE_ATOMIC_OPERATE_ENA |
| EXTMEM_ICACHE_AUTOLOAD_CTRL | EXTMEM_ICACHE_AUTOLOAD_CTRL |
| EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR | EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR |
| EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE | EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE |
| EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR | EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR |
| EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE | EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE |
| EXTMEM_ICACHE_CTRL | EXTMEM_ICACHE_CTRL |
| EXTMEM_ICACHE_CTRL1 | EXTMEM_ICACHE_CTRL1 |
| EXTMEM_ICACHE_FREEZE | EXTMEM_ICACHE_FREEZE |
| EXTMEM_ICACHE_LOCK_ADDR | EXTMEM_ICACHE_LOCK_ADDR |
| EXTMEM_ICACHE_LOCK_CTRL | EXTMEM_ICACHE_LOCK_CTRL |
| EXTMEM_ICACHE_LOCK_SIZE | EXTMEM_ICACHE_LOCK_SIZE |
| EXTMEM_ICACHE_PRELOAD_ADDR | EXTMEM_ICACHE_PRELOAD_ADDR |
| EXTMEM_ICACHE_PRELOAD_CTRL | EXTMEM_ICACHE_PRELOAD_CTRL |
| EXTMEM_ICACHE_PRELOAD_SIZE | EXTMEM_ICACHE_PRELOAD_SIZE |
| EXTMEM_ICACHE_PRELOCK_CTRL | EXTMEM_ICACHE_PRELOCK_CTRL |
| EXTMEM_ICACHE_PRELOCK_SCT0_ADDR | EXTMEM_ICACHE_PRELOCK_SCT0_ADDR |
| EXTMEM_ICACHE_PRELOCK_SCT1_ADDR | EXTMEM_ICACHE_PRELOCK_SCT1_ADDR |
| EXTMEM_ICACHE_PRELOCK_SCT_SIZE | EXTMEM_ICACHE_PRELOCK_SCT_SIZE |
| EXTMEM_ICACHE_SYNC_ADDR | EXTMEM_ICACHE_SYNC_ADDR |
| EXTMEM_ICACHE_SYNC_CTRL | EXTMEM_ICACHE_SYNC_CTRL |
| EXTMEM_ICACHE_SYNC_SIZE | EXTMEM_ICACHE_SYNC_SIZE |
| EXTMEM_ICACHE_TAG_POWER_CTRL | EXTMEM_ICACHE_TAG_POWER_CTRL |