Expand description
SPI0 control1 register.
Structs§
- CTRL1_
SPEC - SPI0 control1 register.
Type Aliases§
- CLK_
MODE_ R - Field
CLK_MODE
reader - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on. - CLK_
MODE_ W - Field
CLK_MODE
writer - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on. - R
- Register
CTRL1
reader - RXFIFO_
RST_ W - Field
RXFIFO_RST
writer - SPI0 RX FIFO reset signal. - W
- Register
CTRL1
writer