Struct esp32c2::extmem::cache_ilg_int_clr::W
source · pub struct W(_);Expand description
Register CACHE_ILG_INT_CLR writer
Implementations§
source§impl W
impl W
sourcepub fn icache_sync_op_fault_int_clr(
&mut self
) -> ICACHE_SYNC_OP_FAULT_INT_CLR_W<'_, 0>
pub fn icache_sync_op_fault_int_clr(
&mut self
) -> ICACHE_SYNC_OP_FAULT_INT_CLR_W<'_, 0>
Bit 0 - The bit is used to clear interrupt by sync configurations fault.
sourcepub fn icache_preload_op_fault_int_clr(
&mut self
) -> ICACHE_PRELOAD_OP_FAULT_INT_CLR_W<'_, 1>
pub fn icache_preload_op_fault_int_clr(
&mut self
) -> ICACHE_PRELOAD_OP_FAULT_INT_CLR_W<'_, 1>
Bit 1 - The bit is used to clear interrupt by preload configurations fault.
sourcepub fn mmu_entry_fault_int_clr(&mut self) -> MMU_ENTRY_FAULT_INT_CLR_W<'_, 5>
pub fn mmu_entry_fault_int_clr(&mut self) -> MMU_ENTRY_FAULT_INT_CLR_W<'_, 5>
Bit 5 - The bit is used to clear interrupt by mmu entry fault.
sourcepub fn ibus_cnt_ovf_int_clr(&mut self) -> IBUS_CNT_OVF_INT_CLR_W<'_, 7>
pub fn ibus_cnt_ovf_int_clr(&mut self) -> IBUS_CNT_OVF_INT_CLR_W<'_, 7>
Bit 7 - The bit is used to clear interrupt by ibus counter overflow.
sourcepub fn dbus_cnt_ovf_int_clr(&mut self) -> DBUS_CNT_OVF_INT_CLR_W<'_, 8>
pub fn dbus_cnt_ovf_int_clr(&mut self) -> DBUS_CNT_OVF_INT_CLR_W<'_, 8>
Bit 8 - The bit is used to clear interrupt by dbus counter overflow.