Struct esp32c2::extmem::icache_sync_size::W

pub struct W(_);

Register ICACHE_SYNC_SIZE writer

Implementations

impl W

pub fn icache_sync_size(&mut self) -> ICACHE_SYNC_SIZE_W<'_, 0>

Bits 0:22 - The bits are used to configure the length for sync operations. The bits are the counts of cache block. It should be combined with ICACHE_SYNC_ADDR_REG.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<ICACHE_SYNC_SIZE_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<ICACHE_SYNC_SIZE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<ICACHE_SYNC_SIZE_SPEC>> for W

fn from(writer: W<ICACHE_SYNC_SIZE_SPEC>) -> Self

Converts to this type from the input type.