Struct esp32c2::spi0::fsm::R

pub struct R(_);

Register FSM reader

Implementations

impl R

pub fn cspi_st(&self) -> CSPI_ST_R

Bits 0:3 - The current status of SPI0 slave FSM: spi0_slv_st. 0: idle state, 1: preparation state, 2: send command state, 3: send address state, 4: wait state, 5: read data state, 6:write data state, 7: done state, 8: read data end state.

pub fn em_st(&self) -> EM_ST_R

Bits 4:6 - The current status of SPI0 master FSM: spi0_mst_st. 0: idle state, 1:EM_CACHE_GRANT , 2: program/erase suspend state, 3: SPI0 read data state, 4: wait cache/EDMA sent data is stored in SPI0 TX FIFO, 5: SPI0 write data state.

pub fn cspi_lock_delay_time(&self) -> CSPI_LOCK_DELAY_TIME_R

Bits 7:11 - The lock delay time of SPI0/1 arbiter by spi0_slv_st, after PER is sent by SPI1.

Methods from Deref<Target = R<FSM_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<FSM_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<FSM_SPEC>> for R

fn from(reader: R<FSM_SPEC>) -> Self

Converts to this type from the input type.