Module esp32c2::dma::int_raw_ch0

DMA_INT_RAW_CH0_REG.

Structs

INT_RAW_CH0_SPEC

DMA_INT_RAW_CH0_REG.

R

Register INT_RAW_CH0 reader

Type Definitions

INFIFO_OVF_CH0_INT_RAW_R

Field INFIFO_OVF_CH0_INT_RAW reader - This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is overflow.

INFIFO_UDF_CH0_INT_RAW_R

Field INFIFO_UDF_CH0_INT_RAW reader - This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is underflow.

IN_DONE_CH0_INT_RAW_R

Field IN_DONE_CH0_INT_RAW reader - The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0.

IN_DSCR_EMPTY_CH0_INT_RAW_R

Field IN_DSCR_EMPTY_CH0_INT_RAW reader - The raw interrupt bit turns to high level when Rx buffer pointed by inlink is full and receiving data is not completed, but there is no more inlink for Rx channel 0.

IN_DSCR_ERR_CH0_INT_RAW_R

Field IN_DSCR_ERR_CH0_INT_RAW reader - The raw interrupt bit turns to high level when detecting inlink descriptor error, including owner error, the second and third word error of inlink descriptor for Rx channel 0.

IN_ERR_EOF_CH0_INT_RAW_R

Field IN_ERR_EOF_CH0_INT_RAW reader - The raw interrupt bit turns to high level when data error is detected only in the case that the peripheral is UHCI0 for Rx channel 0. For other peripherals, this raw interrupt is reserved.

IN_SUC_EOF_CH0_INT_RAW_R

Field IN_SUC_EOF_CH0_INT_RAW reader - The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0. For UHCI0, the raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received and no data error is detected for Rx channel 0.

OUTFIFO_OVF_CH0_INT_RAW_R

Field OUTFIFO_OVF_CH0_INT_RAW reader - This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is overflow.

OUTFIFO_UDF_CH0_INT_RAW_R

Field OUTFIFO_UDF_CH0_INT_RAW reader - This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is underflow.

OUT_DONE_CH0_INT_RAW_R

Field OUT_DONE_CH0_INT_RAW reader - The raw interrupt bit turns to high level when the last data pointed by one outlink descriptor has been transmitted to peripherals for Tx channel 0.

OUT_DSCR_ERR_CH0_INT_RAW_R

Field OUT_DSCR_ERR_CH0_INT_RAW reader - The raw interrupt bit turns to high level when detecting outlink descriptor error, including owner error, the second and third word error of outlink descriptor for Tx channel 0.

OUT_EOF_CH0_INT_RAW_R

Field OUT_EOF_CH0_INT_RAW reader - The raw interrupt bit turns to high level when the last data pointed by one outlink descriptor has been read from memory for Tx channel 0.

OUT_TOTAL_EOF_CH0_INT_RAW_R

Field OUT_TOTAL_EOF_CH0_INT_RAW reader - The raw interrupt bit turns to high level when data corresponding a outlink (includes one link descriptor or few link descriptors) is transmitted out for Tx channel 0.