Module esp32c2::extmem::core0_acs_cache_int_clr

This description will be updated in the near future.

Structs

CORE0_ACS_CACHE_INT_CLR_SPEC

This description will be updated in the near future.

W

Register CORE0_ACS_CACHE_INT_CLR writer

Type Definitions

CORE0_DBUS_ACS_MSK_IC_INT_CLR_W

Field CORE0_DBUS_ACS_MSK_IC_INT_CLR writer - The bit is used to clear interrupt by cpu access icache while the corresponding dbus is disabled or icache is disabled which include speculative access.

CORE0_DBUS_REJECT_INT_CLR_W

Field CORE0_DBUS_REJECT_INT_CLR writer - The bit is used to clear interrupt by authentication fail.

CORE0_DBUS_WR_IC_INT_CLR_W

Field CORE0_DBUS_WR_IC_INT_CLR writer - The bit is used to clear interrupt by dbus trying to write icache

CORE0_IBUS_ACS_MSK_IC_INT_CLR_W

Field CORE0_IBUS_ACS_MSK_IC_INT_CLR writer - The bit is used to clear interrupt by cpu access icache while the corresponding ibus is disabled or icache is disabled which include speculative access.

CORE0_IBUS_REJECT_INT_CLR_W

Field CORE0_IBUS_REJECT_INT_CLR writer - The bit is used to clear interrupt by authentication fail.

CORE0_IBUS_WR_IC_INT_CLR_W

Field CORE0_IBUS_WR_IC_INT_CLR writer - The bit is used to clear interrupt by ibus trying to write icache