esp32c2/rtc_cntl/
ulp_cp_timer_1.rs

1#[doc = "Register `ULP_CP_TIMER_1` reader"]
2pub type R = crate::R<ULP_CP_TIMER_1_SPEC>;
3#[doc = "Register `ULP_CP_TIMER_1` writer"]
4pub type W = crate::W<ULP_CP_TIMER_1_SPEC>;
5#[doc = "Field `ULP_CP_TIMER_SLP_CYCLE` reader - sleep cycles for ULP-coprocessor timer"]
6pub type ULP_CP_TIMER_SLP_CYCLE_R = crate::FieldReader<u32>;
7#[doc = "Field `ULP_CP_TIMER_SLP_CYCLE` writer - sleep cycles for ULP-coprocessor timer"]
8pub type ULP_CP_TIMER_SLP_CYCLE_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>;
9impl R {
10    #[doc = "Bits 8:31 - sleep cycles for ULP-coprocessor timer"]
11    #[inline(always)]
12    pub fn ulp_cp_timer_slp_cycle(&self) -> ULP_CP_TIMER_SLP_CYCLE_R {
13        ULP_CP_TIMER_SLP_CYCLE_R::new((self.bits >> 8) & 0x00ff_ffff)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("ULP_CP_TIMER_1")
20            .field("ulp_cp_timer_slp_cycle", &self.ulp_cp_timer_slp_cycle())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 8:31 - sleep cycles for ULP-coprocessor timer"]
26    #[inline(always)]
27    pub fn ulp_cp_timer_slp_cycle(&mut self) -> ULP_CP_TIMER_SLP_CYCLE_W<ULP_CP_TIMER_1_SPEC> {
28        ULP_CP_TIMER_SLP_CYCLE_W::new(self, 8)
29    }
30}
31#[doc = "register description\n\nYou can [`read`](crate::Reg::read) this register and get [`ulp_cp_timer_1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ulp_cp_timer_1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct ULP_CP_TIMER_1_SPEC;
33impl crate::RegisterSpec for ULP_CP_TIMER_1_SPEC {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`ulp_cp_timer_1::R`](R) reader structure"]
37impl crate::Readable for ULP_CP_TIMER_1_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`ulp_cp_timer_1::W`](W) writer structure"]
39impl crate::Writable for ULP_CP_TIMER_1_SPEC {
40    type Safety = crate::Unsafe;
41}
42#[doc = "`reset()` method sets ULP_CP_TIMER_1 to value 0xc800"]
43impl crate::Resettable for ULP_CP_TIMER_1_SPEC {
44    const RESET_VALUE: u32 = 0xc800;
45}
esp32c2/rtc_cntl/ulp_cp_timer_1.rs

esp32c2/rtc_cntl/
ulp_cp_timer_1.rs
