Module interrupt_core0

Source
Expand description

Interrupt Controller (Core 0)

Modules§

clock_gate
register description
core_0_intr_map
core_0_intr_status
register description
cpu_int_clear
register description
cpu_int_eip_status
register description
cpu_int_enable
register description
cpu_int_pri
register description
cpu_int_thresh
register description
cpu_int_type
register description
interrupt_reg_date
register description

Structs§

RegisterBlock
Register block

Type Aliases§

CLOCK_GATE
CLOCK_GATE (rw) register accessor: register description
CORE_0_INTR_MAP
CORE_0_INTR_MAP (rw) register accessor:
CORE_0_INTR_STATUS
CORE_0_INTR_STATUS (r) register accessor: register description
CPU_INT_CLEAR
CPU_INT_CLEAR (rw) register accessor: register description
CPU_INT_EIP_STATUS
CPU_INT_EIP_STATUS (r) register accessor: register description
CPU_INT_ENABLE
CPU_INT_ENABLE (rw) register accessor: register description
CPU_INT_PRI
CPU_INT_PRI (rw) register accessor: register description
CPU_INT_THRESH
CPU_INT_THRESH (rw) register accessor: register description
CPU_INT_TYPE
CPU_INT_TYPE (rw) register accessor: register description
INTERRUPT_REG_DATE
INTERRUPT_REG_DATE (rw) register accessor: register description