esp32c2/spi1/
timing_cali.rs

1#[doc = "Register `TIMING_CALI` reader"]
2pub type R = crate::R<TIMING_CALI_SPEC>;
3#[doc = "Field `TIMING_CALI` reader - The bit is used to enable timing auto-calibration for all reading operations."]
4pub type TIMING_CALI_R = crate::BitReader;
5#[doc = "Field `EXTRA_DUMMY_CYCLELEN` reader - add extra dummy spi clock cycle length for spi clock calibration."]
6pub type EXTRA_DUMMY_CYCLELEN_R = crate::FieldReader;
7impl R {
8    #[doc = "Bit 1 - The bit is used to enable timing auto-calibration for all reading operations."]
9    #[inline(always)]
10    pub fn timing_cali(&self) -> TIMING_CALI_R {
11        TIMING_CALI_R::new(((self.bits >> 1) & 1) != 0)
12    }
13    #[doc = "Bits 2:4 - add extra dummy spi clock cycle length for spi clock calibration."]
14    #[inline(always)]
15    pub fn extra_dummy_cyclelen(&self) -> EXTRA_DUMMY_CYCLELEN_R {
16        EXTRA_DUMMY_CYCLELEN_R::new(((self.bits >> 2) & 7) as u8)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("TIMING_CALI")
23            .field("timing_cali", &self.timing_cali())
24            .field("extra_dummy_cyclelen", &self.extra_dummy_cyclelen())
25            .finish()
26    }
27}
28#[doc = "SPI1 timing control register\n\nYou can [`read`](crate::Reg::read) this register and get [`timing_cali::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
29pub struct TIMING_CALI_SPEC;
30impl crate::RegisterSpec for TIMING_CALI_SPEC {
31    type Ux = u32;
32}
33#[doc = "`read()` method returns [`timing_cali::R`](R) reader structure"]
34impl crate::Readable for TIMING_CALI_SPEC {}
35#[doc = "`reset()` method sets TIMING_CALI to value 0"]
36impl crate::Resettable for TIMING_CALI_SPEC {
37    const RESET_VALUE: u32 = 0;
38}
esp32c2/spi1/timing_cali.rs

esp32c2/spi1/
timing_cali.rs
