Struct esp32c2::EFUSE

pub struct EFUSE { /* private fields */ }

eFuse Controller

Implementations

impl EFUSE

pub const PTR: *const RegisterBlock = {0x60008800 as *const efuse::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn pgm_data0(&self) -> &PGM_DATA0

0x00 - Register 0 that stores data to be programmed.

pub fn pgm_data1(&self) -> &PGM_DATA1

0x04 - Register 1 that stores data to be programmed.

pub fn pgm_data2(&self) -> &PGM_DATA2

0x08 - Register 2 that stores data to be programmed.

pub fn pgm_data3(&self) -> &PGM_DATA3

0x0c - Register 3 that stores data to be programmed.

pub fn pgm_data4(&self) -> &PGM_DATA4

0x10 - Register 4 that stores data to be programmed.

pub fn pgm_data5(&self) -> &PGM_DATA5

0x14 - Register 5 that stores data to be programmed.

pub fn pgm_data6(&self) -> &PGM_DATA6

0x18 - Register 6 that stores data to be programmed.

pub fn pgm_data7(&self) -> &PGM_DATA7

0x1c - Register 7 that stores data to be programmed.

pub fn pgm_check_value0(&self) -> &PGM_CHECK_VALUE0

0x20 - Register 0 that stores the RS code to be programmed.

pub fn pgm_check_value1(&self) -> &PGM_CHECK_VALUE1

0x24 - Register 1 that stores the RS code to be programmed.

pub fn pgm_check_value2(&self) -> &PGM_CHECK_VALUE2

0x28 - Register 2 that stores the RS code to be programmed.

pub fn rd_wr_dis(&self) -> &RD_WR_DIS

0x2c - BLOCK0 data register 0.

pub fn rd_repeat_data0(&self) -> &RD_REPEAT_DATA0

0x30 - BLOCK0 data register 1.

pub fn rd_blk1_data0(&self) -> &RD_BLK1_DATA0

0x34 - BLOCK1 data register 0.

pub fn rd_blk1_data1(&self) -> &RD_BLK1_DATA1

0x38 - BLOCK1 data register 1.

pub fn rd_blk1_data2(&self) -> &RD_BLK1_DATA2

0x3c - BLOCK1 data register 2.

pub fn rd_blk2_data0(&self) -> &RD_BLK2_DATA0

0x40 - Register 0 of BLOCK2.

pub fn rd_blk2_data1(&self) -> &RD_BLK2_DATA1

0x44 - Register 1 of BLOCK2.

pub fn rd_blk2_data2(&self) -> &RD_BLK2_DATA2

0x48 - Register 2 of BLOCK2.

pub fn rd_blk2_data3(&self) -> &RD_BLK2_DATA3

0x4c - Register 3 of BLOCK2.

pub fn rd_blk2_data4(&self) -> &RD_BLK2_DATA4

0x50 - Register 4 of BLOCK2.

pub fn rd_blk2_data5(&self) -> &RD_BLK2_DATA5

0x54 - Register 5 of BLOCK2.

pub fn rd_blk2_data6(&self) -> &RD_BLK2_DATA6

0x58 - Register 6 of BLOCK2.

pub fn rd_blk2_data7(&self) -> &RD_BLK2_DATA7

0x5c - Register 7 of BLOCK2.

pub fn rd_blk3_data0(&self) -> &RD_BLK3_DATA0

0x60 - Register 0 of BLOCK3.

pub fn rd_blk3_data1(&self) -> &RD_BLK3_DATA1

0x64 - Register 1 of BLOCK3.

pub fn rd_blk3_data2(&self) -> &RD_BLK3_DATA2

0x68 - Register 2 of BLOCK3.

pub fn rd_blk3_data3(&self) -> &RD_BLK3_DATA3

0x6c - Register 3 of BLOCK3.

pub fn rd_blk3_data4(&self) -> &RD_BLK3_DATA4

0x70 - Register 4 of BLOCK3.

pub fn rd_blk3_data5(&self) -> &RD_BLK3_DATA5

0x74 - Register 5 of BLOCK3.

pub fn rd_blk3_data6(&self) -> &RD_BLK3_DATA6

0x78 - Register 6 of BLOCK3.

pub fn rd_blk3_data7(&self) -> &RD_BLK3_DATA7

0x7c - Register 7 of BLOCK3.

pub fn rd_repeat_err(&self) -> &RD_REPEAT_ERR

0x80 - Programming error record register 0 of BLOCK0.

pub fn rd_rs_err(&self) -> &RD_RS_ERR

0x84 - Programming error record register 0 of BLOCK1-10.

pub fn clk(&self) -> &CLK

0x88 - eFuse clcok configuration register.

pub fn conf(&self) -> &CONF

0x8c - eFuse operation mode configuraiton register

pub fn status(&self) -> &STATUS

0x90 - eFuse status register.

pub fn cmd(&self) -> &CMD

0x94 - eFuse command register.

pub fn int_raw(&self) -> &INT_RAW

0x98 - eFuse raw interrupt register.

pub fn int_st(&self) -> &INT_ST

0x9c - eFuse interrupt status register.

pub fn int_ena(&self) -> &INT_ENA

0x100 - eFuse interrupt enable register.

pub fn int_clr(&self) -> &INT_CLR

0x104 - eFuse interrupt clear register.

pub fn dac_conf(&self) -> &DAC_CONF

0x108 - Controls the eFuse programming voltage.

pub fn rd_tim_conf(&self) -> &RD_TIM_CONF

0x10c - Configures read timing parameters.

pub fn wr_tim_conf0(&self) -> &WR_TIM_CONF0

0x110 - Configurarion register 0 of eFuse programming timing parameters.

pub fn wr_tim_conf1(&self) -> &WR_TIM_CONF1

0x114 - Configurarion register 1 of eFuse programming timing parameters.

pub fn wr_tim_conf2(&self) -> &WR_TIM_CONF2

0x118 - Configurarion register 2 of eFuse programming timing parameters.

pub fn date(&self) -> &DATE

0x1fc - eFuse version register.

Trait Implementations

impl Debug for EFUSE

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for EFUSE

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for EFUSE