pub type W = W<CLK_CONF_SPEC>;Expand description
Register CLK_CONF writer
Implementations§
source§impl W
 
impl W
sourcepub fn sclk_div_num(&mut self) -> SCLK_DIV_NUM_W<'_, CLK_CONF_SPEC, 0>
 
pub fn sclk_div_num(&mut self) -> SCLK_DIV_NUM_W<'_, CLK_CONF_SPEC, 0>
Bits 0:7 - the integral part of the fractional divisor for i2c module
sourcepub fn sclk_div_a(&mut self) -> SCLK_DIV_A_W<'_, CLK_CONF_SPEC, 8>
 
pub fn sclk_div_a(&mut self) -> SCLK_DIV_A_W<'_, CLK_CONF_SPEC, 8>
Bits 8:13 - the numerator of the fractional part of the fractional divisor for i2c module
sourcepub fn sclk_div_b(&mut self) -> SCLK_DIV_B_W<'_, CLK_CONF_SPEC, 14>
 
pub fn sclk_div_b(&mut self) -> SCLK_DIV_B_W<'_, CLK_CONF_SPEC, 14>
Bits 14:19 - the denominator of the fractional part of the fractional divisor for i2c module
sourcepub fn sclk_sel(&mut self) -> SCLK_SEL_W<'_, CLK_CONF_SPEC, 20>
 
pub fn sclk_sel(&mut self) -> SCLK_SEL_W<'_, CLK_CONF_SPEC, 20>
Bit 20 - The clock selection for i2c module:0-XTAL,1-CLK_8MHz.
sourcepub fn sclk_active(&mut self) -> SCLK_ACTIVE_W<'_, CLK_CONF_SPEC, 21>
 
pub fn sclk_active(&mut self) -> SCLK_ACTIVE_W<'_, CLK_CONF_SPEC, 21>
Bit 21 - The clock switch for i2c module