Struct esp32c2::spi1::int_raw::R

pub struct R(_);

Register INT_RAW reader

Implementations

impl R

pub fn per_end_int_raw(&self) -> PER_END_INT_RAW_R

Bit 0 - The raw bit for SPI_MEM_PER_END_INT interrupt. 1: Triggered when Auto Resume command (0x7A) is sent and flash is resumed. 0: Others.

pub fn pes_end_int_raw(&self) -> PES_END_INT_RAW_R

Bit 1 - The raw bit for SPI_MEM_PES_END_INT interrupt.1: Triggered when Auto Suspend command (0x75) is sent and flash is suspended. 0: Others.

pub fn wpe_end_int_raw(&self) -> WPE_END_INT_RAW_R

Bit 2 - The raw bit for SPI_MEM_WPE_END_INT interrupt. 1: Triggered when WRSR/PP/SE/BE/CE is sent and flash is already idle. 0: Others.

pub fn slv_st_end_int_raw(&self) -> SLV_ST_END_INT_RAW_R

Bit 3 - The raw bit for SPI_MEM_SLV_ST_END_INT interrupt. 1: Triggered when spi1_slv_st is changed from non idle state to idle state. It means that SPI_CS raises high. 0: Others

pub fn mst_st_end_int_raw(&self) -> MST_ST_END_INT_RAW_R

Bit 4 - The raw bit for SPI_MEM_MST_ST_END_INT interrupt. 1: Triggered when spi1_mst_st is changed from non idle state to idle state. 0: Others.

pub fn brown_out_int_raw(&self) -> BROWN_OUT_INT_RAW_R

Bit 5 - The raw bit for SPI_MEM_BROWN_OUT_INT interrupt. 1: Triggered condition is that chip is loosing power and RTC module sends out brown out close flash request to SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered and MSPI returns to idle state. 0: Others.

Methods from Deref<Target = R<INT_RAW_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<INT_RAW_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<INT_RAW_SPEC>> for R

fn from(reader: R<INT_RAW_SPEC>) -> Self

Converts to this type from the input type.