Expand description
SPI module clock and register clock control
Structs
- SPI module clock and register clock control
- Register
CLK_GATEreader - Register
CLK_GATEwriter
Type Definitions
- Field
CLK_ENreader - Set this bit to enable clk gate - Field
CLK_ENwriter - Set this bit to enable clk gate - Field
MST_CLK_ACTIVEreader - Set this bit to power on the SPI module clock. - Field
MST_CLK_ACTIVEwriter - Set this bit to power on the SPI module clock. - Field
MST_CLK_SELreader - This bit is used to select SPI module clock source in master mode. 1: PLL_CLK_80M. 0: XTAL CLK. - Field
MST_CLK_SELwriter - This bit is used to select SPI module clock source in master mode. 1: PLL_CLK_80M. 0: XTAL CLK.