Module esp32c2::spi2::user2

SPI USER control register 2

Structs

• R
  Register USER2 reader
• USER2_SPEC
  SPI USER control register 2
• W
  Register USER2 writer

Type Definitions

• MST_REMPTY_ERR_END_EN_R
  Field MST_REMPTY_ERR_END_EN reader - 1: SPI transfer is ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode. 0: SPI transfer is not ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode.
• MST_REMPTY_ERR_END_EN_W
  Field MST_REMPTY_ERR_END_EN writer - 1: SPI transfer is ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode. 0: SPI transfer is not ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode.
• USR_COMMAND_BITLEN_R
  Field USR_COMMAND_BITLEN reader - The length in bits of command phase. The register value shall be (bit_num-1). Can be configured in CONF state.
• USR_COMMAND_BITLEN_W
  Field USR_COMMAND_BITLEN writer - The length in bits of command phase. The register value shall be (bit_num-1). Can be configured in CONF state.
• USR_COMMAND_VALUE_R
  Field USR_COMMAND_VALUE reader - The value of command. Can be configured in CONF state.
• USR_COMMAND_VALUE_W
  Field USR_COMMAND_VALUE writer - The value of command. Can be configured in CONF state.