Struct esp32c2_hal::pac::uart0::conf0::W
pub struct W(_);
Expand description
Register CONF0
writer
Implementations§
§impl W
impl W
pub fn parity(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 0>
pub fn parity(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 0>
Bit 0 - This register is used to configure the parity check mode.
pub fn parity_en(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 1>
pub fn parity_en(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 1>
Bit 1 - Set this bit to enable uart parity check.
pub fn bit_num(
&mut self
) -> FieldWriterRaw<'_, u32, CONF0_SPEC, u8, u8, Unsafe, 2, 2>
pub fn bit_num(
&mut self
) -> FieldWriterRaw<'_, u32, CONF0_SPEC, u8, u8, Unsafe, 2, 2>
Bits 2:3 - This register is used to set the length of data.
pub fn stop_bit_num(
&mut self
) -> FieldWriterRaw<'_, u32, CONF0_SPEC, u8, u8, Unsafe, 2, 4>
pub fn stop_bit_num(
&mut self
) -> FieldWriterRaw<'_, u32, CONF0_SPEC, u8, u8, Unsafe, 2, 4>
Bits 4:5 - This register is used to set the length of stop bit.
pub fn sw_rts(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 6>
pub fn sw_rts(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 6>
Bit 6 - This register is used to configure the software rts signal which is used in software flow control.
pub fn sw_dtr(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 7>
pub fn sw_dtr(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 7>
Bit 7 - This register is used to configure the software dtr signal which is used in software flow control.
pub fn txd_brk(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 8>
pub fn txd_brk(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 8>
Bit 8 - Set this bit to enbale transmitter to send NULL when the process of sending data is done.
pub fn irda_dplx(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 9>
pub fn irda_dplx(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 9>
Bit 9 - Set this bit to enable IrDA loopback mode.
pub fn irda_tx_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 10>
pub fn irda_tx_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 10>
Bit 10 - This is the start enable bit for IrDA transmitter.
pub fn irda_wctl(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 11>
pub fn irda_wctl(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 11>
Bit 11 - 1’h1: The IrDA transmitter’s 11th bit is the same as 10th bit. 1’h0: Set IrDA transmitter’s 11th bit to 0.
pub fn irda_tx_inv(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 12>
pub fn irda_tx_inv(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 12>
Bit 12 - Set this bit to invert the level of IrDA transmitter.
pub fn irda_rx_inv(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 13>
pub fn irda_rx_inv(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 13>
Bit 13 - Set this bit to invert the level of IrDA receiver.
pub fn loopback(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 14>
pub fn loopback(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 14>
Bit 14 - Set this bit to enable uart loopback test mode.
pub fn tx_flow_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 15>
pub fn tx_flow_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 15>
Bit 15 - Set this bit to enable flow control function for transmitter.
pub fn irda_en(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 16>
pub fn irda_en(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 16>
Bit 16 - Set this bit to enable IrDA protocol.
pub fn rxfifo_rst(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 17>
pub fn rxfifo_rst(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 17>
Bit 17 - Set this bit to reset the uart receive-FIFO.
pub fn txfifo_rst(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 18>
pub fn txfifo_rst(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 18>
Bit 18 - Set this bit to reset the uart transmit-FIFO.
pub fn rxd_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 19>
pub fn rxd_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 19>
Bit 19 - Set this bit to inverse the level value of uart rxd signal.
pub fn cts_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 20>
pub fn cts_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 20>
Bit 20 - Set this bit to inverse the level value of uart cts signal.
pub fn dsr_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 21>
pub fn dsr_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 21>
Bit 21 - Set this bit to inverse the level value of uart dsr signal.
pub fn txd_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 22>
pub fn txd_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 22>
Bit 22 - Set this bit to inverse the level value of uart txd signal.
pub fn rts_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 23>
pub fn rts_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 23>
Bit 23 - Set this bit to inverse the level value of uart rts signal.
pub fn dtr_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 24>
pub fn dtr_inv(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 24>
Bit 24 - Set this bit to inverse the level value of uart dtr signal.
pub fn clk_en(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 25>
pub fn clk_en(&mut self) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 25>
Bit 25 - 1’h1: Force clock on for register. 1’h0: Support clock only when application writes registers.
pub fn err_wr_mask(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 26>
pub fn err_wr_mask(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 26>
Bit 26 - 1’h1: Receiver stops storing data into FIFO when data is wrong. 1’h0: Receiver stores the data even if the received data is wrong.
pub fn autobaud_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 27>
pub fn autobaud_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 27>
Bit 27 - This is the enable bit for detecting baudrate.
pub fn mem_clk_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 28>
pub fn mem_clk_en(
&mut self
) -> BitWriterRaw<'_, u32, CONF0_SPEC, bool, BitM, 28>
Bit 28 - UART memory clock gate enable signal.
Methods from Deref<Target = W<CONF0_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.