Struct esp32c2_hal::pac::spi2::dma_conf::W

pub struct W(_);

Register DMA_CONF writer

Implementations

impl W

pub fn dma_slv_seg_trans_en(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 18>

Bit 18 - Enable dma segment transfer in spi dma half slave mode. 1: enable. 0: disable.

pub fn slv_rx_seg_trans_clr_en(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 19>

Bit 19 - 1: spi_dma_infifo_full_vld is cleared by spi slave cmd 5. 0: spi_dma_infifo_full_vld is cleared by spi_trans_done.

pub fn slv_tx_seg_trans_clr_en(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 20>

Bit 20 - 1: spi_dma_outfifo_empty_vld is cleared by spi slave cmd 6. 0: spi_dma_outfifo_empty_vld is cleared by spi_trans_done.

pub fn rx_eof_en(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 21>

Bit 21 - 1: spi_dma_inlink_eof is set when the number of dma pushed data bytes is equal to the value of spi_slv/mst_dma_rd_bytelen[19:0] in spi dma transition. 0: spi_dma_inlink_eof is set by spi_trans_done in non-seg-trans or spi_dma_seg_trans_done in seg-trans.

pub fn dma_rx_ena(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 27>

Bit 27 - Set this bit to enable SPI DMA controlled receive data mode.

pub fn dma_tx_ena(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 28>

Bit 28 - Set this bit to enable SPI DMA controlled send data mode.

pub fn rx_afifo_rst(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 29>

Bit 29 - Set this bit to reset RX AFIFO, which is used to receive data in SPI master and slave mode transfer.

pub fn buf_afifo_rst(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 30>

Bit 30 - Set this bit to reset BUF TX AFIFO, which is used send data out in SPI slave CPU controlled mode transfer and master mode transfer.

pub fn dma_afifo_rst(
    &mut self
) -> BitWriterRaw<'_, u32, DMA_CONF_SPEC, bool, BitM, 31>

Bit 31 - Set this bit to reset DMA TX AFIFO, which is used to send data out in SPI slave DMA controlled mode transfer.

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<DMA_CONF_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<DMA_CONF_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<DMA_CONF_SPEC>> for W

fn from(writer: W<DMA_CONF_SPEC>) -> W

Converts to this type from the input type.