Struct esp32c2_hal::pac::spi2::clk_gate::CLK_GATE_SPEC

pub struct CLK_GATE_SPEC;

SPI module clock and register clock control

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see clk_gate module

Trait Implementations

impl Readable for CLK_GATE_SPEC

read() method returns clk_gate::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for CLK_GATE_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CLK_GATE_SPEC

reset() method sets CLK_GATE to value 0

const RESET_VALUE: <CLK_GATE_SPEC as RegisterSpec>::Ux = {transmute(0x00000000): <esp_hal_common::esp32c2::spi2::clk_gate::CLK_GATE_SPEC as esp_hal_common::esp32c2::generic::RegisterSpec>::Ux}

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for CLK_GATE_SPEC

write(|w| ..) method takes clk_gate::W writer structure

type Writer = W

Writer type argument to write, et al.

const ZERO_TO_MODIFY_FIELDS_BITMAP: <CLK_GATE_SPEC as RegisterSpec>::Ux = {transmute(0x00000000): <esp_hal_common::esp32c2::spi2::clk_gate::CLK_GATE_SPEC as esp_hal_common::esp32c2::generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: <CLK_GATE_SPEC as RegisterSpec>::Ux = {transmute(0x00000000): <esp_hal_common::esp32c2::spi2::clk_gate::CLK_GATE_SPEC as esp_hal_common::esp32c2::generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1