Struct esp32c2_hal::pac::spi1::user::W
pub struct W(_);
Expand description
Register USER
writer
Implementations§
§impl W
impl W
pub fn ck_out_edge(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 9>
pub fn ck_out_edge(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 9>
Bit 9 - the bit combined with spi_mem_mosi_delay_mode bits to set mosi signal delay mode.
pub fn fwrite_dual(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 12>
pub fn fwrite_dual(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 12>
Bit 12 - In the write operations read-data phase apply 2 signals
pub fn fwrite_quad(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 13>
pub fn fwrite_quad(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 13>
Bit 13 - In the write operations read-data phase apply 4 signals
pub fn fwrite_dio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 14>
pub fn fwrite_dio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 14>
Bit 14 - In the write operations address phase and read-data phase apply 2 signals.
pub fn fwrite_qio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 15>
pub fn fwrite_qio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 15>
Bit 15 - In the write operations address phase and read-data phase apply 4 signals.
pub fn usr_miso_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 24>
pub fn usr_miso_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 24>
Bit 24 - read-data phase only access to high-part of the buffer spi_mem_w8~spi_mem_w15. 1: enable 0: disable.
pub fn usr_mosi_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 25>
pub fn usr_mosi_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 25>
Bit 25 - write-data phase only access to high-part of the buffer spi_mem_w8~spi_mem_w15. 1: enable 0: disable.
pub fn usr_dummy_idle(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 26>
pub fn usr_dummy_idle(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 26>
Bit 26 - SPI clock is disable in dummy phase when the bit is enable.
pub fn usr_mosi(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 27>
pub fn usr_mosi(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 27>
Bit 27 - This bit enable the write-data phase of an operation.
pub fn usr_miso(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 28>
pub fn usr_miso(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 28>
Bit 28 - This bit enable the read-data phase of an operation.
pub fn usr_dummy(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 29>
pub fn usr_dummy(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 29>
Bit 29 - This bit enable the dummy phase of an operation.
pub fn usr_addr(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 30>
pub fn usr_addr(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 30>
Bit 30 - This bit enable the address phase of an operation.
pub fn usr_command(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 31>
pub fn usr_command(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 31>
Bit 31 - This bit enable the command phase of an operation.
Methods from Deref<Target = W<USER_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.