Struct esp32c2_hal::pac::spi1::sus_status::W

pub struct W(_);

Expand description

Register SUS_STATUS writer

Implementations§

§

impl W

pub fn flash_sus(
&mut self
) -> BitWriterRaw<'_, u32, SUS_STATUS_SPEC, bool, BitM, 0>

Bit 0 - The status of flash suspend, only used in SPI1.

pub fn wait_pesr_cmd_2b(
&mut self
) -> BitWriterRaw<'_, u32, SUS_STATUS_SPEC, bool, BitM, 1>

Bit 1 - 1: SPI1 sends out SPI_MEM_WAIT_PESR_COMMAND[15:0] to check SUS/SUS1/SUS2 bit. 0: SPI1 sends out SPI_MEM_WAIT_PESR_COMMAND[7:0] to check SUS/SUS1/SUS2 bit.

pub fn flash_hpm_dly_128(
&mut self
) -> BitWriterRaw<'_, u32, SUS_STATUS_SPEC, bool, BitM, 2>

Bit 2 - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after HPM command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after HPM command is sent.

pub fn flash_res_dly_128(
&mut self
) -> BitWriterRaw<'_, u32, SUS_STATUS_SPEC, bool, BitM, 3>

Bit 3 - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after RES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after RES command is sent.

pub fn flash_dp_dly_128(
&mut self
) -> BitWriterRaw<'_, u32, SUS_STATUS_SPEC, bool, BitM, 4>

Bit 4 - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after DP command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after DP command is sent.

pub fn flash_per_dly_128(
&mut self
) -> BitWriterRaw<'_, u32, SUS_STATUS_SPEC, bool, BitM, 5>

Bit 5 - Valid when SPI_MEM_FLASH_PER_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after PER command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PER command is sent.

pub fn flash_pes_dly_128(
&mut self
) -> BitWriterRaw<'_, u32, SUS_STATUS_SPEC, bool, BitM, 6>

Bit 6 - Valid when SPI_MEM_FLASH_PES_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after PES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PES command is sent.