Struct esp32c2_hal::pac::spi1::misc::W
pub struct W(_);
Expand description
Register MISC
writer
Implementations§
§impl W
impl W
pub fn cs0_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 0>
pub fn cs0_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 0>
Bit 0 - SPI_CS0 pin enable, 1: disable SPI_CS0, 0: SPI_CS0 pin is active to select SPI device, such as flash, external RAM and so on.
pub fn cs1_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 1>
pub fn cs1_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 1>
Bit 1 - SPI_CS1 pin enable, 1: disable SPI_CS1, 0: SPI_CS1 pin is active to select SPI device, such as flash, external RAM and so on.
pub fn ck_idle_edge(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 9>
pub fn ck_idle_edge(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 9>
Bit 9 - 1: spi clk line is high when idle 0: spi clk line is low when idle
pub fn cs_keep_active(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 10>
pub fn cs_keep_active(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 10>
Bit 10 - spi cs line keep low when the bit is set.
Methods from Deref<Target = W<MISC_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.