Struct esp32c2_hal::pac::spi1::cmd::W

pub struct W(_);

Expand description

Register CMD writer

Implementations§

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impl W

pub fn flash_pe(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 17>

Bit 17 - In user mode, it is set to indicate that program/erase operation will be triggered. The bit is combined with spi_mem_usr bit. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn usr(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 18>

Bit 18 - User define command enable. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_hpm(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 19>

Bit 19 - Drive Flash into high performance mode. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_res(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 20>

Bit 20 - This bit combined with reg_resandres bit releases Flash from the power-down state or high performance mode and obtains the devices ID. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_dp(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 21>

Bit 21 - Drive Flash into power down. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_ce(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 22>

Bit 22 - Chip erase enable. Chip erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_be(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 23>

Bit 23 - Block erase enable(32KB) . Block erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_se(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 24>

Bit 24 - Sector erase enable(4KB). Sector erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_pp(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 25>

Bit 25 - Page program enable(1 byte ~256 bytes data to be programmed). Page program operation will be triggered when the bit is set. The bit will be cleared once the operation done .1: enable 0: disable.

pub fn flash_wrsr(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 26>

Bit 26 - Write status register enable. Write status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_rdsr(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 27>

Bit 27 - Read status register-1. Read status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.

pub fn flash_rdid(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 28>

Bit 28 - Read JEDEC ID . Read ID command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.

pub fn flash_wrdi(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 29>

Bit 29 - Write flash disable. Write disable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.

pub fn flash_wren(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 30>

Bit 30 - Write flash enable. Write enable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.

pub fn flash_read(&mut self) -> BitWriterRaw<'_, u32, CMD_SPEC, bool, BitM, 31>

Bit 31 - Read flash enable. Read flash operation will be triggered when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.