Struct esp32c2_hal::pac::i2c0::ctr::W

pub struct W(_);

Register CTR writer

Implementations

impl W

pub fn sda_force_out(
    &mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 0>

Bit 0 - 0: direct output, 1: open drain output.

pub fn scl_force_out(
    &mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 1>

Bit 1 - 0: direct output, 1: open drain output.

pub fn sample_scl_level(
    &mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 2>

Bit 2 - This register is used to select the sample mode. 1: sample SDA data on the SCL low level. 0: sample SDA data on the SCL high level.

pub fn rx_full_ack_level(
    &mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 3>

Bit 3 - This register is used to configure the ACK value that need to sent by master when the rx_fifo_cnt has reached the threshold.

pub fn ms_mode(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 4>

Bit 4 - Set this bit to configure the module as an I2C Master. Clear this bit to configure the module as an I2C Slave.

pub fn trans_start(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 5>

Bit 5 - Set this bit to start sending the data in txfifo.

pub fn tx_lsb_first(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 6>

Bit 6 - This bit is used to control the sending mode for data needing to be sent. 1: send data from the least significant bit, 0: send data from the most significant bit.

pub fn rx_lsb_first(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 7>

Bit 7 - This bit is used to control the storage mode for received data. 1: receive data from the least significant bit, 0: receive data from the most significant bit.

pub fn clk_en(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 8>

Bit 8 - Reserved

pub fn arbitration_en(
    &mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 9>

Bit 9 - This is the enable bit for arbitration_lost.

pub fn fsm_rst(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 10>

Bit 10 - This register is used to reset the scl FMS.

pub fn conf_upgate(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 11>

Bit 11 - synchronization bit

pub fn slv_tx_auto_start_en(
    &mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 12>

Bit 12 - This is the enable bit for slave to send data automatically

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CTR_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CTR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CTR_SPEC>> for W

fn from(writer: W<CTR_SPEC>) -> W

Converts to this type from the input type.