Struct esp32c2_hal::pac::extmem::icache_atomic_operate_ena::W
pub struct W(_);
Expand description
Register ICACHE_ATOMIC_OPERATE_ENA
writer
Implementations§
§impl W
impl W
pub fn icache_atomic_operate_ena(
&mut self
) -> BitWriterRaw<'_, u32, ICACHE_ATOMIC_OPERATE_ENA_SPEC, bool, BitM, 0>
pub fn icache_atomic_operate_ena(
&mut self
) -> BitWriterRaw<'_, u32, ICACHE_ATOMIC_OPERATE_ENA_SPEC, bool, BitM, 0>
Bit 0 - The bit is used to activate icache atomic operation protection. In this case, sync/lock operation can not interrupt miss-work. This feature does not work during invalidateAll operation.
Methods from Deref<Target = W<ICACHE_ATOMIC_OPERATE_ENA_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.
Trait Implementations§
§impl From<W<ICACHE_ATOMIC_OPERATE_ENA_SPEC>> for W
impl From<W<ICACHE_ATOMIC_OPERATE_ENA_SPEC>> for W
§fn from(writer: W<ICACHE_ATOMIC_OPERATE_ENA_SPEC>) -> W
fn from(writer: W<ICACHE_ATOMIC_OPERATE_ENA_SPEC>) -> W
Converts to this type from the input type.