Struct esp32c2_hal::pac::uart0::conf0::R
pub struct R(_);
Expand description
Register CONF0
reader
Implementations
impl R
impl R
pub fn parity(&self) -> BitReaderRaw<bool>
pub fn parity(&self) -> BitReaderRaw<bool>
Bit 0 - This register is used to configure the parity check mode.
pub fn bit_num(&self) -> FieldReaderRaw<u8, u8>
pub fn bit_num(&self) -> FieldReaderRaw<u8, u8>
Bits 2:3 - This register is used to set the length of data.
pub fn stop_bit_num(&self) -> FieldReaderRaw<u8, u8>
pub fn stop_bit_num(&self) -> FieldReaderRaw<u8, u8>
Bits 4:5 - This register is used to set the length of stop bit.
pub fn sw_rts(&self) -> BitReaderRaw<bool>
pub fn sw_rts(&self) -> BitReaderRaw<bool>
Bit 6 - This register is used to configure the software rts signal which is used in software flow control.
pub fn sw_dtr(&self) -> BitReaderRaw<bool>
pub fn sw_dtr(&self) -> BitReaderRaw<bool>
Bit 7 - This register is used to configure the software dtr signal which is used in software flow control.
pub fn txd_brk(&self) -> BitReaderRaw<bool>
pub fn txd_brk(&self) -> BitReaderRaw<bool>
Bit 8 - Set this bit to enbale transmitter to send NULL when the process of sending data is done.
pub fn irda_tx_en(&self) -> BitReaderRaw<bool>
pub fn irda_tx_en(&self) -> BitReaderRaw<bool>
Bit 10 - This is the start enable bit for IrDA transmitter.
pub fn irda_wctl(&self) -> BitReaderRaw<bool>
pub fn irda_wctl(&self) -> BitReaderRaw<bool>
Bit 11 - 1’h1: The IrDA transmitter’s 11th bit is the same as 10th bit. 1’h0: Set IrDA transmitter’s 11th bit to 0.
pub fn irda_tx_inv(&self) -> BitReaderRaw<bool>
pub fn irda_tx_inv(&self) -> BitReaderRaw<bool>
Bit 12 - Set this bit to invert the level of IrDA transmitter.
pub fn irda_rx_inv(&self) -> BitReaderRaw<bool>
pub fn irda_rx_inv(&self) -> BitReaderRaw<bool>
Bit 13 - Set this bit to invert the level of IrDA receiver.
pub fn loopback(&self) -> BitReaderRaw<bool>
pub fn loopback(&self) -> BitReaderRaw<bool>
Bit 14 - Set this bit to enable uart loopback test mode.
pub fn tx_flow_en(&self) -> BitReaderRaw<bool>
pub fn tx_flow_en(&self) -> BitReaderRaw<bool>
Bit 15 - Set this bit to enable flow control function for transmitter.
pub fn rxfifo_rst(&self) -> BitReaderRaw<bool>
pub fn rxfifo_rst(&self) -> BitReaderRaw<bool>
Bit 17 - Set this bit to reset the uart receive-FIFO.
pub fn txfifo_rst(&self) -> BitReaderRaw<bool>
pub fn txfifo_rst(&self) -> BitReaderRaw<bool>
Bit 18 - Set this bit to reset the uart transmit-FIFO.
pub fn rxd_inv(&self) -> BitReaderRaw<bool>
pub fn rxd_inv(&self) -> BitReaderRaw<bool>
Bit 19 - Set this bit to inverse the level value of uart rxd signal.
pub fn cts_inv(&self) -> BitReaderRaw<bool>
pub fn cts_inv(&self) -> BitReaderRaw<bool>
Bit 20 - Set this bit to inverse the level value of uart cts signal.
pub fn dsr_inv(&self) -> BitReaderRaw<bool>
pub fn dsr_inv(&self) -> BitReaderRaw<bool>
Bit 21 - Set this bit to inverse the level value of uart dsr signal.
pub fn txd_inv(&self) -> BitReaderRaw<bool>
pub fn txd_inv(&self) -> BitReaderRaw<bool>
Bit 22 - Set this bit to inverse the level value of uart txd signal.
pub fn rts_inv(&self) -> BitReaderRaw<bool>
pub fn rts_inv(&self) -> BitReaderRaw<bool>
Bit 23 - Set this bit to inverse the level value of uart rts signal.
pub fn dtr_inv(&self) -> BitReaderRaw<bool>
pub fn dtr_inv(&self) -> BitReaderRaw<bool>
Bit 24 - Set this bit to inverse the level value of uart dtr signal.
pub fn clk_en(&self) -> BitReaderRaw<bool>
pub fn clk_en(&self) -> BitReaderRaw<bool>
Bit 25 - 1’h1: Force clock on for register. 1’h0: Support clock only when application writes registers.
pub fn err_wr_mask(&self) -> BitReaderRaw<bool>
pub fn err_wr_mask(&self) -> BitReaderRaw<bool>
Bit 26 - 1’h1: Receiver stops storing data into FIFO when data is wrong. 1’h0: Receiver stores the data even if the received data is wrong.
pub fn autobaud_en(&self) -> BitReaderRaw<bool>
pub fn autobaud_en(&self) -> BitReaderRaw<bool>
Bit 27 - This is the enable bit for detecting baudrate.
pub fn mem_clk_en(&self) -> BitReaderRaw<bool>
pub fn mem_clk_en(&self) -> BitReaderRaw<bool>
Bit 28 - UART memory clock gate enable signal.
Methods from Deref<Target = R<CONF0_SPEC>>
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.