Struct esp32c2_hal::pac::spi2::clk_gate::W

pub struct W(_);

Register CLK_GATE writer

Implementations

impl W

pub fn clk_en(&mut self) -> BitWriterRaw<'_, u32, CLK_GATE_SPEC, bool, BitM, 0>

Bit 0 - Set this bit to enable clk gate

pub fn mst_clk_active(
    &mut self
) -> BitWriterRaw<'_, u32, CLK_GATE_SPEC, bool, BitM, 1>

Bit 1 - Set this bit to power on the SPI module clock.

pub fn mst_clk_sel(
    &mut self
) -> BitWriterRaw<'_, u32, CLK_GATE_SPEC, bool, BitM, 2>

Bit 2 - This bit is used to select SPI module clock source in master mode. 1: PLL_CLK_80M. 0: XTAL CLK.

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CLK_GATE_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CLK_GATE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CLK_GATE_SPEC>> for W

fn from(writer: W<CLK_GATE_SPEC>) -> W

Converts to this type from the input type.