Struct esp32c2_hal::pac::spi0::cache_fctrl::CACHE_FCTRL_SPEC

pub struct CACHE_FCTRL_SPEC;
Expand description

SPI0 bit mode control register.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see cache_fctrl module

Trait Implementations

read() method returns cache_fctrl::R reader structure

Result from a call to read and argument to modify.
Raw register type (u8, u16, u32, …).

reset() method sets CACHE_FCTRL to value 0

Reset value of the register.
Reset value of the register.

write(|w| ..) method takes cache_fctrl::W writer structure

Writer type argument to write, et al.
Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0
Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.