Struct esp32c2_hal::pac::gpio::pin::R

pub struct R(_);

Register PIN%s reader

Implementations

impl R

pub fn sync2_bypass(&self) -> FieldReaderRaw<u8, u8>

Bits 0:1 - set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.

pub fn pad_driver(&self) -> BitReaderRaw<bool>

Bit 2 - set this bit to select pad driver. 1:open-drain. 0:normal.

pub fn sync1_bypass(&self) -> FieldReaderRaw<u8, u8>

Bits 3:4 - set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.

pub fn int_type(&self) -> FieldReaderRaw<u8, u8>

Bits 7:9 - set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level

pub fn wakeup_enable(&self) -> BitReaderRaw<bool>

Bit 10 - set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode)

pub fn config(&self) -> FieldReaderRaw<u8, u8>

Bits 11:12 - reserved

pub fn int_ena(&self) -> FieldReaderRaw<u8, u8>

Bits 13:17 - set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt.

Methods from Deref<Target = R<PIN_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<PIN_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<PIN_SPEC>> for R

fn from(reader: R<PIN_SPEC>) -> R

Converts to this type from the input type.