Expand description
Peripheral access API for ESP32-C2 microcontrollers (generated using svd2rust v0.35.0 ( ))
You can find an overview of the generated API here.
API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open
.
Re-exports§
pub use self::uart0 as uart1;
Modules§
- apb_
ctrl - APB (Advanced Peripheral Bus) Controller
- apb_
saradc - SAR (Successive Approximation Register) Analog-to-Digital Converter
- assist_
debug - Debug Assist
- bb
- BB Peripheral
- dma
- DMA (Direct Memory Access) Controller
- ecc
- ECC (ECC Hardware Accelerator)
- efuse
- eFuse Controller
- extmem
- External Memory
- generic
- Common register and bit access and modify traits
- gpio
- General Purpose Input/Output
- i2c0
- I2C (Inter-Integrated Circuit) Controller 0
- i2c_
ana_ mst - I2C_ANA_MST Peripheral
- interrupt_
core0 - Interrupt Controller (Core 0)
- io_mux
- Input/Output Multiplexer
- ledc
- LED Control PWM (Pulse Width Modulation)
- modem_
clkrst - MODEM_CLKRST Peripheral
- rng
- Hardware Random Number Generator
- rtc_
cntl - Real-Time Clock Control
- sensitive
- SENSITIVE Peripheral
- sha
- SHA (Secure Hash Algorithm) Accelerator
- spi0
- SPI (Serial Peripheral Interface) Controller 0
- spi1
- SPI (Serial Peripheral Interface) Controller 1
- spi2
- SPI (Serial Peripheral Interface) Controller 2
- system
- System Configuration Registers
- systimer
- System Timer
- timg0
- Timer Group 0
- uart0
- UART (Universal Asynchronous Receiver-Transmitter) Controller 0
- xts_aes
- XTS-AES-128 Flash Encryption
Structs§
- APB_
CTRL - APB (Advanced Peripheral Bus) Controller
- APB_
SARADC - SAR (Successive Approximation Register) Analog-to-Digital Converter
- ASSIST_
DEBUG - Debug Assist
- BB
- BB Peripheral
- DMA
- DMA (Direct Memory Access) Controller
- ECC
- ECC (ECC Hardware Accelerator)
- EFUSE
- eFuse Controller
- EXTMEM
- External Memory
- GPIO
- General Purpose Input/Output
- I2C0
- I2C (Inter-Integrated Circuit) Controller 0
- I2C_
ANA_ MST - I2C_ANA_MST Peripheral
- INTERRUPT_
CORE0 - Interrupt Controller (Core 0)
- IO_MUX
- Input/Output Multiplexer
- LEDC
- LED Control PWM (Pulse Width Modulation)
- MODEM_
CLKRST - MODEM_CLKRST Peripheral
- Peripherals
- All the peripherals.
- RNG
- Hardware Random Number Generator
- RTC_
CNTL - Real-Time Clock Control
- SENSITIVE
- SENSITIVE Peripheral
- SHA
- SHA (Secure Hash Algorithm) Accelerator
- SPI0
- SPI (Serial Peripheral Interface) Controller 0
- SPI1
- SPI (Serial Peripheral Interface) Controller 1
- SPI2
- SPI (Serial Peripheral Interface) Controller 2
- SYSTEM
- System Configuration Registers
- SYSTIMER
- System Timer
- TIMG0
- Timer Group 0
- UART0
- UART (Universal Asynchronous Receiver-Transmitter) Controller 0
- UART1
- UART (Universal Asynchronous Receiver-Transmitter) Controller 1
- XTS_AES
- XTS-AES-128 Flash Encryption
Enums§
- Interrupt
- Enumeration of all the interrupts.
Constants§
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority