Type Alias R

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pub type R = R<INT_ENA_SPEC>;
Expand description

Register INT_ENA reader

Aliased Type§

struct R { /* private fields */ }

Implementations§

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impl R

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pub fn hstimer_ovf(&self, n: u8) -> HSTIMER_OVF_R

The interrupt enable bit for high speed channel(0-3) counter overflow interrupt.

`n` is number of field in register. `n == 0` corresponds to `HSTIMER0_OVF` field.
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pub fn hstimer_ovf_iter(&self) -> impl Iterator<Item = HSTIMER_OVF_R> + '_

Iterator for array of: The interrupt enable bit for high speed channel(0-3) counter overflow interrupt.

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pub fn hstimer0_ovf(&self) -> HSTIMER_OVF_R

Bit 0 - The interrupt enable bit for high speed channel0 counter overflow interrupt.

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pub fn hstimer1_ovf(&self) -> HSTIMER_OVF_R

Bit 1 - The interrupt enable bit for high speed channel1 counter overflow interrupt.

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pub fn hstimer2_ovf(&self) -> HSTIMER_OVF_R

Bit 2 - The interrupt enable bit for high speed channel2 counter overflow interrupt.

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pub fn hstimer3_ovf(&self) -> HSTIMER_OVF_R

Bit 3 - The interrupt enable bit for high speed channel3 counter overflow interrupt.

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pub fn lstimer_ovf(&self, n: u8) -> LSTIMER_OVF_R

The interrupt enable bit for low speed channel(0-3) counter overflow interrupt.

`n` is number of field in register. `n == 0` corresponds to `LSTIMER0_OVF` field.
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pub fn lstimer_ovf_iter(&self) -> impl Iterator<Item = LSTIMER_OVF_R> + '_

Iterator for array of: The interrupt enable bit for low speed channel(0-3) counter overflow interrupt.

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pub fn lstimer0_ovf(&self) -> LSTIMER_OVF_R

Bit 4 - The interrupt enable bit for low speed channel0 counter overflow interrupt.

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pub fn lstimer1_ovf(&self) -> LSTIMER_OVF_R

Bit 5 - The interrupt enable bit for low speed channel1 counter overflow interrupt.

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pub fn lstimer2_ovf(&self) -> LSTIMER_OVF_R

Bit 6 - The interrupt enable bit for low speed channel2 counter overflow interrupt.

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pub fn lstimer3_ovf(&self) -> LSTIMER_OVF_R

Bit 7 - The interrupt enable bit for low speed channel3 counter overflow interrupt.

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pub fn duty_chng_end_hsch(&self, n: u8) -> DUTY_CHNG_END_HSCH_R

The interrupt enable bit for high speed channel (0-7) duty change done interrupt.

`n` is number of field in register. `n == 0` corresponds to `DUTY_CHNG_END_HSCH0` field.
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pub fn duty_chng_end_hsch_iter( &self, ) -> impl Iterator<Item = DUTY_CHNG_END_HSCH_R> + '_

Iterator for array of: The interrupt enable bit for high speed channel (0-7) duty change done interrupt.

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pub fn duty_chng_end_hsch0(&self) -> DUTY_CHNG_END_HSCH_R

Bit 8 - The interrupt enable bit for high speed channel 0 duty change done interrupt.

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pub fn duty_chng_end_hsch1(&self) -> DUTY_CHNG_END_HSCH_R

Bit 9 - The interrupt enable bit for high speed channel 1 duty change done interrupt.

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pub fn duty_chng_end_hsch2(&self) -> DUTY_CHNG_END_HSCH_R

Bit 10 - The interrupt enable bit for high speed channel 2 duty change done interrupt.

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pub fn duty_chng_end_hsch3(&self) -> DUTY_CHNG_END_HSCH_R

Bit 11 - The interrupt enable bit for high speed channel 3 duty change done interrupt.

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pub fn duty_chng_end_hsch4(&self) -> DUTY_CHNG_END_HSCH_R

Bit 12 - The interrupt enable bit for high speed channel 4 duty change done interrupt.

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pub fn duty_chng_end_hsch5(&self) -> DUTY_CHNG_END_HSCH_R

Bit 13 - The interrupt enable bit for high speed channel 5 duty change done interrupt.

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pub fn duty_chng_end_hsch6(&self) -> DUTY_CHNG_END_HSCH_R

Bit 14 - The interrupt enable bit for high speed channel 6 duty change done interrupt.

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pub fn duty_chng_end_hsch7(&self) -> DUTY_CHNG_END_HSCH_R

Bit 15 - The interrupt enable bit for high speed channel 7 duty change done interrupt.

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pub fn duty_chng_end_lsch(&self, n: u8) -> DUTY_CHNG_END_LSCH_R

The interrupt enable bit for low speed channel (0-7) duty change done interrupt.

`n` is number of field in register. `n == 0` corresponds to `DUTY_CHNG_END_LSCH0` field.
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pub fn duty_chng_end_lsch_iter( &self, ) -> impl Iterator<Item = DUTY_CHNG_END_LSCH_R> + '_

Iterator for array of: The interrupt enable bit for low speed channel (0-7) duty change done interrupt.

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pub fn duty_chng_end_lsch0(&self) -> DUTY_CHNG_END_LSCH_R

Bit 16 - The interrupt enable bit for low speed channel 0 duty change done interrupt.

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pub fn duty_chng_end_lsch1(&self) -> DUTY_CHNG_END_LSCH_R

Bit 17 - The interrupt enable bit for low speed channel 1 duty change done interrupt.

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pub fn duty_chng_end_lsch2(&self) -> DUTY_CHNG_END_LSCH_R

Bit 18 - The interrupt enable bit for low speed channel 2 duty change done interrupt.

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pub fn duty_chng_end_lsch3(&self) -> DUTY_CHNG_END_LSCH_R

Bit 19 - The interrupt enable bit for low speed channel 3 duty change done interrupt.

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pub fn duty_chng_end_lsch4(&self) -> DUTY_CHNG_END_LSCH_R

Bit 20 - The interrupt enable bit for low speed channel 4 duty change done interrupt.

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pub fn duty_chng_end_lsch5(&self) -> DUTY_CHNG_END_LSCH_R

Bit 21 - The interrupt enable bit for low speed channel 5 duty change done interrupt.

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pub fn duty_chng_end_lsch6(&self) -> DUTY_CHNG_END_LSCH_R

Bit 22 - The interrupt enable bit for low speed channel 6 duty change done interrupt.

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pub fn duty_chng_end_lsch7(&self) -> DUTY_CHNG_END_LSCH_R

Bit 23 - The interrupt enable bit for low speed channel 7 duty change done interrupt.