1#[doc = "Register `SAR_ATTEN1` reader"]
2pub type R = crate::R<SAR_ATTEN1_SPEC>;
3#[doc = "Register `SAR_ATTEN1` writer"]
4pub type W = crate::W<SAR_ATTEN1_SPEC>;
5#[doc = "Field `SAR1_ATTEN` reader - 2-bit attenuation for each pad 11:1dB 10:6dB 01:3dB 00:0dB"]
6pub type SAR1_ATTEN_R = crate::FieldReader<u32>;
7#[doc = "Field `SAR1_ATTEN` writer - 2-bit attenuation for each pad 11:1dB 10:6dB 01:3dB 00:0dB"]
8pub type SAR1_ATTEN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10 #[doc = "Bits 0:31 - 2-bit attenuation for each pad 11:1dB 10:6dB 01:3dB 00:0dB"]
11 #[inline(always)]
12 pub fn sar1_atten(&self) -> SAR1_ATTEN_R {
13 SAR1_ATTEN_R::new(self.bits)
14 }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("SAR_ATTEN1")
20 .field("sar1_atten", &self.sar1_atten())
21 .finish()
22 }
23}
24impl W {
25 #[doc = "Bits 0:31 - 2-bit attenuation for each pad 11:1dB 10:6dB 01:3dB 00:0dB"]
26 #[inline(always)]
27 pub fn sar1_atten(&mut self) -> SAR1_ATTEN_W<SAR_ATTEN1_SPEC> {
28 SAR1_ATTEN_W::new(self, 0)
29 }
30}
31#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_atten1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_atten1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct SAR_ATTEN1_SPEC;
33impl crate::RegisterSpec for SAR_ATTEN1_SPEC {
34 type Ux = u32;
35}
36#[doc = "`read()` method returns [`sar_atten1::R`](R) reader structure"]
37impl crate::Readable for SAR_ATTEN1_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`sar_atten1::W`](W) writer structure"]
39impl crate::Writable for SAR_ATTEN1_SPEC {
40 type Safety = crate::Unsafe;
41}
42#[doc = "`reset()` method sets SAR_ATTEN1 to value 0xffff_ffff"]
43impl crate::Resettable for SAR_ATTEN1_SPEC {
44 const RESET_VALUE: u32 = 0xffff_ffff;
45}