1#[doc = "Register `HOST_SLC0HOST_INT_CLR` writer"]
2pub type W = crate::W<HOST_SLC0HOST_INT_CLR_SPEC>;
3#[doc = "Field `HOST_SLC0_TOHOST_BIT0_INT_CLR` writer - "]
4pub type HOST_SLC0_TOHOST_BIT0_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `HOST_SLC0_TOHOST_BIT1_INT_CLR` writer - "]
6pub type HOST_SLC0_TOHOST_BIT1_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `HOST_SLC0_TOHOST_BIT2_INT_CLR` writer - "]
8pub type HOST_SLC0_TOHOST_BIT2_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `HOST_SLC0_TOHOST_BIT3_INT_CLR` writer - "]
10pub type HOST_SLC0_TOHOST_BIT3_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `HOST_SLC0_TOHOST_BIT4_INT_CLR` writer - "]
12pub type HOST_SLC0_TOHOST_BIT4_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `HOST_SLC0_TOHOST_BIT5_INT_CLR` writer - "]
14pub type HOST_SLC0_TOHOST_BIT5_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `HOST_SLC0_TOHOST_BIT6_INT_CLR` writer - "]
16pub type HOST_SLC0_TOHOST_BIT6_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `HOST_SLC0_TOHOST_BIT7_INT_CLR` writer - "]
18pub type HOST_SLC0_TOHOST_BIT7_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `HOST_SLC0_TOKEN0_1TO0_INT_CLR` writer - "]
20pub type HOST_SLC0_TOKEN0_1TO0_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `HOST_SLC0_TOKEN1_1TO0_INT_CLR` writer - "]
22pub type HOST_SLC0_TOKEN1_1TO0_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `HOST_SLC0_TOKEN0_0TO1_INT_CLR` writer - "]
24pub type HOST_SLC0_TOKEN0_0TO1_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `HOST_SLC0_TOKEN1_0TO1_INT_CLR` writer - "]
26pub type HOST_SLC0_TOKEN1_0TO1_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `HOST_SLC0HOST_RX_SOF_INT_CLR` writer - "]
28pub type HOST_SLC0HOST_RX_SOF_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `HOST_SLC0HOST_RX_EOF_INT_CLR` writer - "]
30pub type HOST_SLC0HOST_RX_EOF_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `HOST_SLC0HOST_RX_START_INT_CLR` writer - "]
32pub type HOST_SLC0HOST_RX_START_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `HOST_SLC0HOST_TX_START_INT_CLR` writer - "]
34pub type HOST_SLC0HOST_TX_START_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `HOST_SLC0_RX_UDF_INT_CLR` writer - "]
36pub type HOST_SLC0_RX_UDF_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `HOST_SLC0_TX_OVF_INT_CLR` writer - "]
38pub type HOST_SLC0_TX_OVF_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `HOST_SLC0_RX_PF_VALID_INT_CLR` writer - "]
40pub type HOST_SLC0_RX_PF_VALID_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `HOST_SLC0_EXT_BIT0_INT_CLR` writer - "]
42pub type HOST_SLC0_EXT_BIT0_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
43#[doc = "Field `HOST_SLC0_EXT_BIT1_INT_CLR` writer - "]
44pub type HOST_SLC0_EXT_BIT1_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `HOST_SLC0_EXT_BIT2_INT_CLR` writer - "]
46pub type HOST_SLC0_EXT_BIT2_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
47#[doc = "Field `HOST_SLC0_EXT_BIT3_INT_CLR` writer - "]
48pub type HOST_SLC0_EXT_BIT3_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `HOST_SLC0_RX_NEW_PACKET_INT_CLR` writer - "]
50pub type HOST_SLC0_RX_NEW_PACKET_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
51#[doc = "Field `HOST_SLC0_HOST_RD_RETRY_INT_CLR` writer - "]
52pub type HOST_SLC0_HOST_RD_RETRY_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `HOST_GPIO_SDIO_INT_CLR` writer - "]
54pub type HOST_GPIO_SDIO_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
55#[cfg(feature = "impl-register-debug")]
56impl core::fmt::Debug for crate::generic::Reg<HOST_SLC0HOST_INT_CLR_SPEC> {
57 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
58 write!(f, "(not readable)")
59 }
60}
61impl W {
62 #[doc = "Bit 0"]
63 #[inline(always)]
64 pub fn host_slc0_tohost_bit0_int_clr(
65 &mut self,
66 ) -> HOST_SLC0_TOHOST_BIT0_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
67 HOST_SLC0_TOHOST_BIT0_INT_CLR_W::new(self, 0)
68 }
69 #[doc = "Bit 1"]
70 #[inline(always)]
71 pub fn host_slc0_tohost_bit1_int_clr(
72 &mut self,
73 ) -> HOST_SLC0_TOHOST_BIT1_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
74 HOST_SLC0_TOHOST_BIT1_INT_CLR_W::new(self, 1)
75 }
76 #[doc = "Bit 2"]
77 #[inline(always)]
78 pub fn host_slc0_tohost_bit2_int_clr(
79 &mut self,
80 ) -> HOST_SLC0_TOHOST_BIT2_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
81 HOST_SLC0_TOHOST_BIT2_INT_CLR_W::new(self, 2)
82 }
83 #[doc = "Bit 3"]
84 #[inline(always)]
85 pub fn host_slc0_tohost_bit3_int_clr(
86 &mut self,
87 ) -> HOST_SLC0_TOHOST_BIT3_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
88 HOST_SLC0_TOHOST_BIT3_INT_CLR_W::new(self, 3)
89 }
90 #[doc = "Bit 4"]
91 #[inline(always)]
92 pub fn host_slc0_tohost_bit4_int_clr(
93 &mut self,
94 ) -> HOST_SLC0_TOHOST_BIT4_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
95 HOST_SLC0_TOHOST_BIT4_INT_CLR_W::new(self, 4)
96 }
97 #[doc = "Bit 5"]
98 #[inline(always)]
99 pub fn host_slc0_tohost_bit5_int_clr(
100 &mut self,
101 ) -> HOST_SLC0_TOHOST_BIT5_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
102 HOST_SLC0_TOHOST_BIT5_INT_CLR_W::new(self, 5)
103 }
104 #[doc = "Bit 6"]
105 #[inline(always)]
106 pub fn host_slc0_tohost_bit6_int_clr(
107 &mut self,
108 ) -> HOST_SLC0_TOHOST_BIT6_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
109 HOST_SLC0_TOHOST_BIT6_INT_CLR_W::new(self, 6)
110 }
111 #[doc = "Bit 7"]
112 #[inline(always)]
113 pub fn host_slc0_tohost_bit7_int_clr(
114 &mut self,
115 ) -> HOST_SLC0_TOHOST_BIT7_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
116 HOST_SLC0_TOHOST_BIT7_INT_CLR_W::new(self, 7)
117 }
118 #[doc = "Bit 8"]
119 #[inline(always)]
120 pub fn host_slc0_token0_1to0_int_clr(
121 &mut self,
122 ) -> HOST_SLC0_TOKEN0_1TO0_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
123 HOST_SLC0_TOKEN0_1TO0_INT_CLR_W::new(self, 8)
124 }
125 #[doc = "Bit 9"]
126 #[inline(always)]
127 pub fn host_slc0_token1_1to0_int_clr(
128 &mut self,
129 ) -> HOST_SLC0_TOKEN1_1TO0_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
130 HOST_SLC0_TOKEN1_1TO0_INT_CLR_W::new(self, 9)
131 }
132 #[doc = "Bit 10"]
133 #[inline(always)]
134 pub fn host_slc0_token0_0to1_int_clr(
135 &mut self,
136 ) -> HOST_SLC0_TOKEN0_0TO1_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
137 HOST_SLC0_TOKEN0_0TO1_INT_CLR_W::new(self, 10)
138 }
139 #[doc = "Bit 11"]
140 #[inline(always)]
141 pub fn host_slc0_token1_0to1_int_clr(
142 &mut self,
143 ) -> HOST_SLC0_TOKEN1_0TO1_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
144 HOST_SLC0_TOKEN1_0TO1_INT_CLR_W::new(self, 11)
145 }
146 #[doc = "Bit 12"]
147 #[inline(always)]
148 pub fn host_slc0host_rx_sof_int_clr(
149 &mut self,
150 ) -> HOST_SLC0HOST_RX_SOF_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
151 HOST_SLC0HOST_RX_SOF_INT_CLR_W::new(self, 12)
152 }
153 #[doc = "Bit 13"]
154 #[inline(always)]
155 pub fn host_slc0host_rx_eof_int_clr(
156 &mut self,
157 ) -> HOST_SLC0HOST_RX_EOF_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
158 HOST_SLC0HOST_RX_EOF_INT_CLR_W::new(self, 13)
159 }
160 #[doc = "Bit 14"]
161 #[inline(always)]
162 pub fn host_slc0host_rx_start_int_clr(
163 &mut self,
164 ) -> HOST_SLC0HOST_RX_START_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
165 HOST_SLC0HOST_RX_START_INT_CLR_W::new(self, 14)
166 }
167 #[doc = "Bit 15"]
168 #[inline(always)]
169 pub fn host_slc0host_tx_start_int_clr(
170 &mut self,
171 ) -> HOST_SLC0HOST_TX_START_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
172 HOST_SLC0HOST_TX_START_INT_CLR_W::new(self, 15)
173 }
174 #[doc = "Bit 16"]
175 #[inline(always)]
176 pub fn host_slc0_rx_udf_int_clr(
177 &mut self,
178 ) -> HOST_SLC0_RX_UDF_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
179 HOST_SLC0_RX_UDF_INT_CLR_W::new(self, 16)
180 }
181 #[doc = "Bit 17"]
182 #[inline(always)]
183 pub fn host_slc0_tx_ovf_int_clr(
184 &mut self,
185 ) -> HOST_SLC0_TX_OVF_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
186 HOST_SLC0_TX_OVF_INT_CLR_W::new(self, 17)
187 }
188 #[doc = "Bit 18"]
189 #[inline(always)]
190 pub fn host_slc0_rx_pf_valid_int_clr(
191 &mut self,
192 ) -> HOST_SLC0_RX_PF_VALID_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
193 HOST_SLC0_RX_PF_VALID_INT_CLR_W::new(self, 18)
194 }
195 #[doc = "Bit 19"]
196 #[inline(always)]
197 pub fn host_slc0_ext_bit0_int_clr(
198 &mut self,
199 ) -> HOST_SLC0_EXT_BIT0_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
200 HOST_SLC0_EXT_BIT0_INT_CLR_W::new(self, 19)
201 }
202 #[doc = "Bit 20"]
203 #[inline(always)]
204 pub fn host_slc0_ext_bit1_int_clr(
205 &mut self,
206 ) -> HOST_SLC0_EXT_BIT1_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
207 HOST_SLC0_EXT_BIT1_INT_CLR_W::new(self, 20)
208 }
209 #[doc = "Bit 21"]
210 #[inline(always)]
211 pub fn host_slc0_ext_bit2_int_clr(
212 &mut self,
213 ) -> HOST_SLC0_EXT_BIT2_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
214 HOST_SLC0_EXT_BIT2_INT_CLR_W::new(self, 21)
215 }
216 #[doc = "Bit 22"]
217 #[inline(always)]
218 pub fn host_slc0_ext_bit3_int_clr(
219 &mut self,
220 ) -> HOST_SLC0_EXT_BIT3_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
221 HOST_SLC0_EXT_BIT3_INT_CLR_W::new(self, 22)
222 }
223 #[doc = "Bit 23"]
224 #[inline(always)]
225 pub fn host_slc0_rx_new_packet_int_clr(
226 &mut self,
227 ) -> HOST_SLC0_RX_NEW_PACKET_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
228 HOST_SLC0_RX_NEW_PACKET_INT_CLR_W::new(self, 23)
229 }
230 #[doc = "Bit 24"]
231 #[inline(always)]
232 pub fn host_slc0_host_rd_retry_int_clr(
233 &mut self,
234 ) -> HOST_SLC0_HOST_RD_RETRY_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
235 HOST_SLC0_HOST_RD_RETRY_INT_CLR_W::new(self, 24)
236 }
237 #[doc = "Bit 25"]
238 #[inline(always)]
239 pub fn host_gpio_sdio_int_clr(
240 &mut self,
241 ) -> HOST_GPIO_SDIO_INT_CLR_W<HOST_SLC0HOST_INT_CLR_SPEC> {
242 HOST_GPIO_SDIO_INT_CLR_W::new(self, 25)
243 }
244}
245#[doc = "\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`host_slc0host_int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
246pub struct HOST_SLC0HOST_INT_CLR_SPEC;
247impl crate::RegisterSpec for HOST_SLC0HOST_INT_CLR_SPEC {
248 type Ux = u32;
249}
250#[doc = "`write(|w| ..)` method takes [`host_slc0host_int_clr::W`](W) writer structure"]
251impl crate::Writable for HOST_SLC0HOST_INT_CLR_SPEC {
252 type Safety = crate::Unsafe;
253 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
254 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
255}
256#[doc = "`reset()` method sets HOST_SLC0HOST_INT_CLR to value 0"]
257impl crate::Resettable for HOST_SLC0HOST_INT_CLR_SPEC {
258 const RESET_VALUE: u32 = 0;
259}