Struct EMAC_DMA

pub struct EMAC_DMA { /* private fields */ }

Ethernet DMA configuration and control registers

Implementations

impl EMAC_DMA

pub const PTR: *const RegisterBlock = {0x3ff69000 as *const emac_dma::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn dmabusmode(&self) -> &DMABUSMODE

0x00 - Bus mode configuration

pub fn dmatxpolldemand(&self) -> &DMATXPOLLDEMAND

0x04 - When these bits are written with any value the DMA reads the current descriptor to which the Register (Current Host Transmit Descriptor Register) is pointing. If that descriptor is not available (owned by the Host) the transmission returns to the suspend state and Bit[2] (TU) of Status Register is asserted. If the descriptor is available the transmission resumes.

pub fn dmarxpolldemand(&self) -> &DMARXPOLLDEMAND

0x08 - When these bits are written with any value the DMA reads the current descriptor to which the Current Host Receive Descriptor Register is pointing. If that descriptor is not available (owned by the Host) the reception returns to the Suspended state and Bit[7] (RU) of Status Register is asserted. If the descriptor is available the Rx DMA returns to the active state.

pub fn dmarxbaseaddr(&self) -> &DMARXBASEADDR

0x0c - This field contains the base address of the first descriptor in the Receive Descriptor list. The LSB Bits[1:0] are ignored and internally taken as all-zero by the DMA. Therefore these LSB bits are read-only.

pub fn dmatxbaseaddr(&self) -> &DMATXBASEADDR

0x10 - This field contains the base address of the first descriptor in the Transmit Descriptor list. The LSB Bits[1:0] are ignored and are internally taken as all-zero by the DMA.Therefore these LSB bits are read-only.

pub fn dmastatus(&self) -> &DMASTATUS

0x14 - State of interrupts, errors and other events

pub fn dmaoperation_mode(&self) -> &DMAOPERATION_MODE

0x18 - Receive and Transmit operating modes and command

pub fn dmain_en(&self) -> &DMAIN_EN

0x1c -

pub fn dmamissedfr(&self) -> &DMAMISSEDFR

0x20 - Missed Frame and Buffer Overflow Counter Register

pub fn dmarintwdtimer(&self) -> &DMARINTWDTIMER

0x24 - Watchdog timer count on receive

pub fn dmatxcurrdesc(&self) -> &DMATXCURRDESC

0x48 - The address of the current receive descriptor list. Cleared on Reset.Pointer updated by the DMA during operation.

pub fn dmarxcurrdesc(&self) -> &DMARXCURRDESC

0x4c - The address of the current receive descriptor list. Cleared on Reset.Pointer updated by the DMA during operation.

pub fn dmatxcurraddr_buf(&self) -> &DMATXCURRADDR_BUF

0x50 - The address of the current receive descriptor list. Cleared on Reset.Pointer updated by the DMA during operation.

pub fn dmarxcurraddr_buf(&self) -> &DMARXCURRADDR_BUF

0x54 - The address of the current receive descriptor list. Cleared on Reset.Pointer updated by the DMA during operation.

Trait Implementations

impl Debug for EMAC_DMA

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for EMAC_DMA

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for EMAC_DMA