Module cmd

Command and boot configuration register

Structs

CMD_SPEC

Command and boot configuration register

Type Aliases

CARD_NUMBER_R

Field CARD_NUMBER reader - Card number in use. Represents physical slot number of card being accessed. In SD-only mode, up to two cards are supported.

CARD_NUMBER_W

Field CARD_NUMBER writer - Card number in use. Represents physical slot number of card being accessed. In SD-only mode, up to two cards are supported.

CCS_EXPECTED_R

Field CCS_EXPECTED reader - Expected Command Completion Signal (CCS) configuration. 0: Interrupts are not enabled in CE-ATA device (nIEN = 1 in ATA control register), or command does not expect CCS from device; 1: Interrupts are enabled in CE-ATA device (nIEN = 0), and RW_BLK command expects command completion signal from CE-ATA device. If the command expects Command Completion Signal (CCS) from the CE-ATA device, the software should set this control bit. SD/MMC sets Data Transfer Over (DTO) bit in RINTSTS register and generates interrupt to host if Data Transfer Over interrupt is not masked.

CCS_EXPECTED_W

Field CCS_EXPECTED writer - Expected Command Completion Signal (CCS) configuration. 0: Interrupts are not enabled in CE-ATA device (nIEN = 1 in ATA control register), or command does not expect CCS from device; 1: Interrupts are enabled in CE-ATA device (nIEN = 0), and RW_BLK command expects command completion signal from CE-ATA device. If the command expects Command Completion Signal (CCS) from the CE-ATA device, the software should set this control bit. SD/MMC sets Data Transfer Over (DTO) bit in RINTSTS register and generates interrupt to host if Data Transfer Over interrupt is not masked.

CHECK_RESPONSE_CRC_R

Field CHECK_RESPONSE_CRC reader - 0: Do not check; 1: Check response CRC. Some of command responses do not return valid CRC bits. Software should disable CRC checks for those commands in order to disable CRC checking by controller.

CHECK_RESPONSE_CRC_W

Field CHECK_RESPONSE_CRC writer - 0: Do not check; 1: Check response CRC. Some of command responses do not return valid CRC bits. Software should disable CRC checks for those commands in order to disable CRC checking by controller.

DATA_EXPECTED_R

Field DATA_EXPECTED reader - 0: No data transfer expected; 1: Data transfer expected.

DATA_EXPECTED_W

Field DATA_EXPECTED writer - 0: No data transfer expected; 1: Data transfer expected.

INDEX_R

Field INDEX reader - Command index.

INDEX_W

Field INDEX writer - Command index.

R

Register CMD reader

READ_CEATA_DEVICE_R

Field READ_CEATA_DEVICE reader - Read access flag. 0: Host is not performing read access (RW_REG or RW_BLK)towards CE-ATA device; 1: Host is performing read access (RW_REG or RW_BLK) towards CE-ATA device. Software should set this bit to indicate that CE-ATA device is being accessed for read transfer. This bit is used to disable read data timeout indication while performing CE-ATA read transfers. Maximum value of I/O transmission delay can be no less than 10 seconds. SD/MMC should not indicate read data timeout while waiting for data from CE-ATA device.

READ_CEATA_DEVICE_W

Field READ_CEATA_DEVICE writer - Read access flag. 0: Host is not performing read access (RW_REG or RW_BLK)towards CE-ATA device; 1: Host is performing read access (RW_REG or RW_BLK) towards CE-ATA device. Software should set this bit to indicate that CE-ATA device is being accessed for read transfer. This bit is used to disable read data timeout indication while performing CE-ATA read transfers. Maximum value of I/O transmission delay can be no less than 10 seconds. SD/MMC should not indicate read data timeout while waiting for data from CE-ATA device.

READ_WRITE_R

Field READ_WRITE reader - 0: Read from card; 1: Write to card. Don’t care if no data is expected from card.

READ_WRITE_W

Field READ_WRITE writer - 0: Read from card; 1: Write to card. Don’t care if no data is expected from card.

RESPONSE_EXPECT_R

Field RESPONSE_EXPECT reader - 0: No response expected from card; 1: Response expected from card.

RESPONSE_EXPECT_W

Field RESPONSE_EXPECT writer - 0: No response expected from card; 1: Response expected from card.

RESPONSE_LENGTH_R

Field RESPONSE_LENGTH reader - 0: Short response expected from card; 1: Long response expected from card.

RESPONSE_LENGTH_W

Field RESPONSE_LENGTH writer - 0: Short response expected from card; 1: Long response expected from card.

SEND_AUTO_STOP_R

Field SEND_AUTO_STOP reader - 0: No stop command is sent at the end of data transfer; 1: Send stop command at the end of data transfer.

SEND_AUTO_STOP_W

Field SEND_AUTO_STOP writer - 0: No stop command is sent at the end of data transfer; 1: Send stop command at the end of data transfer.

SEND_INITIALIZATION_R

Field SEND_INITIALIZATION reader - 0: Do not send initialization sequence (80 clocks of 1) before sending this command; 1: Send initialization sequence before sending this command. After powered on, 80 clocks must be sent to card for initialization before sending any commands to card. Bit should be set while sending first command to card so that controller will initialize clocks before sending command to card.

SEND_INITIALIZATION_W

Field SEND_INITIALIZATION writer - 0: Do not send initialization sequence (80 clocks of 1) before sending this command; 1: Send initialization sequence before sending this command. After powered on, 80 clocks must be sent to card for initialization before sending any commands to card. Bit should be set while sending first command to card so that controller will initialize clocks before sending command to card.

START_CMD_R

Field START_CMD reader - Start command. Once command is served by the CIU, this bit is automatically cleared. When this bit is set, host should not attempt to write to any command registers. If a write is attempted, hardware lock error is set in raw interrupt register. Once command is sent and a response is received from SD_MMC_CEATA cards, Command Done bit is set in the raw interrupt Register.

START_CMD_W

Field START_CMD writer - Start command. Once command is served by the CIU, this bit is automatically cleared. When this bit is set, host should not attempt to write to any command registers. If a write is attempted, hardware lock error is set in raw interrupt register. Once command is sent and a response is received from SD_MMC_CEATA cards, Command Done bit is set in the raw interrupt Register.

STOP_ABORT_CMD_R

Field STOP_ABORT_CMD reader - 0: Neither stop nor abort command can stop current data transfer. If abort is sent to function-number currently selected or not in data-transfer mode, then bit should be set to 0; 1: Stop or abort command intended to stop current data transfer in progress. When open-ended or predefined data transfer is in progress, and host issues stop or abort command to stop data transfer, bit should be set so that command/data state-machines of CIU can return correctly to idle state.

STOP_ABORT_CMD_W

Field STOP_ABORT_CMD writer - 0: Neither stop nor abort command can stop current data transfer. If abort is sent to function-number currently selected or not in data-transfer mode, then bit should be set to 0; 1: Stop or abort command intended to stop current data transfer in progress. When open-ended or predefined data transfer is in progress, and host issues stop or abort command to stop data transfer, bit should be set so that command/data state-machines of CIU can return correctly to idle state.

TRANSFER_MODE_R

Field TRANSFER_MODE reader - Block data transfer command; 1: Stream data transfer command. Don’t care if no data expected.

TRANSFER_MODE_W

Field TRANSFER_MODE writer - Block data transfer command; 1: Stream data transfer command. Don’t care if no data expected.

UPDATE_CLOCK_REGISTERS_ONLY_R

Field UPDATE_CLOCK_REGISTERS_ONLY reader - 0: Normal command sequence; 1: Do not send commands, just update clock register value into card clock domain. Following register values are transferred into card clock domain: CLKDIV, CLRSRC, and CLKENA. Changes card clocks (change frequency, truncate off or on, and set low-frequency mode). This is provided in order to change clock frequency or stop clock without having to send command to cards. During normal command sequence, when sdhost_update_clock_registers_only = 0, following control registers are transferred from BIU to CIU: CMD, CMDARG, TMOUT, CTYPE, BLKSIZ, and BYTCNT. CIU uses new register values for new command sequence to card(s). When bit is set, there are no Command Done interrupts because no command is sent to SD_MMC_CEATA cards.

UPDATE_CLOCK_REGISTERS_ONLY_W

Field UPDATE_CLOCK_REGISTERS_ONLY writer - 0: Normal command sequence; 1: Do not send commands, just update clock register value into card clock domain. Following register values are transferred into card clock domain: CLKDIV, CLRSRC, and CLKENA. Changes card clocks (change frequency, truncate off or on, and set low-frequency mode). This is provided in order to change clock frequency or stop clock without having to send command to cards. During normal command sequence, when sdhost_update_clock_registers_only = 0, following control registers are transferred from BIU to CIU: CMD, CMDARG, TMOUT, CTYPE, BLKSIZ, and BYTCNT. CIU uses new register values for new command sequence to card(s). When bit is set, there are no Command Done interrupts because no command is sent to SD_MMC_CEATA cards.

USE_HOLE_R

Field USE_HOLE reader - Use Hold Register. 0: CMD and DATA sent to card bypassing HOLD Register; 1: CMD and DATA sent to card through the HOLD Register.

USE_HOLE_W

Field USE_HOLE writer - Use Hold Register. 0: CMD and DATA sent to card bypassing HOLD Register; 1: CMD and DATA sent to card through the HOLD Register.

W

Register CMD writer

WAIT_PRVDATA_COMPLETE_R

Field WAIT_PRVDATA_COMPLETE reader - 0: Send command at once, even if previous data transfer has not completed; 1: Wait for previous data transfer to complete before sending Command. The SDHOST_WAIT_PRVDATA_COMPLETE] = 0 option is typically used to query status of card during data transfer or to stop current data transfer. SDHOST_CARD_NUMBERr should be same as in previous command.

WAIT_PRVDATA_COMPLETE_W

Field WAIT_PRVDATA_COMPLETE writer - 0: Send command at once, even if previous data transfer has not completed; 1: Wait for previous data transfer to complete before sending Command. The SDHOST_WAIT_PRVDATA_COMPLETE] = 0 option is typically used to query status of card during data transfer or to stop current data transfer. SDHOST_CARD_NUMBERr should be same as in previous command.