Enum Interrupt

#[repr(u16)]
pub enum Interrupt {
    WIFI_MAC = 0,
    WIFI_NMI = 1,
    WIFI_BB = 2,
    BT_MAC = 3,
    BT_BB = 4,
    BT_BB_NMI = 5,
    RWBT = 6,
    RWBLE = 7,
    RWBT_NMI = 8,
    RWBLE_NMI = 9,
    UHCI0 = 12,
    UHCI1 = 13,
    TG0_T0_LEVEL = 14,
    TG0_T1_LEVEL = 15,
    TG0_WDT_LEVEL = 16,
    TG0_LACT_LEVEL = 17,
    TG1_T0_LEVEL = 18,
    TG1_T1_LEVEL = 19,
    TG1_WDT_LEVEL = 20,
    TG1_LACT_LEVEL = 21,
    GPIO = 22,
    GPIO_NMI = 23,
    FROM_CPU_INTR0 = 24,
    FROM_CPU_INTR1 = 25,
    FROM_CPU_INTR2 = 26,
    FROM_CPU_INTR3 = 27,
    SPI0 = 28,
    SPI1 = 29,
    SPI2 = 30,
    SPI3 = 31,
    I2S0 = 32,
    I2S1 = 33,
    UART0 = 34,
    UART1 = 35,
    UART2 = 36,
    SDIO_HOST = 37,
    ETH_MAC = 38,
    MCPWM0 = 39,
    MCPWM1 = 40,
    MCPWM2 = 41,
    MCPWM3 = 42,
    LEDC = 43,
    EFUSE = 44,
    TWAI0 = 45,
    RTC_CORE = 46,
    RMT = 47,
    PCNT = 48,
    I2C_EXT0 = 49,
    I2C_EXT1 = 50,
    RSA = 51,
    SPI1_DMA = 52,
    SPI2_DMA = 53,
    SPI3_DMA = 54,
    WDT = 55,
    TIMER1 = 56,
    TIMER2 = 57,
    TG0_T0_EDGE = 58,
    TG0_T1_EDGE = 59,
    TG0_WDT_EDGE = 60,
    TG0_LACT_EDGE = 61,
    TG1_T0_EDGE = 62,
    TG1_T1_EDGE = 63,
    TG1_WDT_EDGE = 64,
    TG1_LACT_EDGE = 65,
    MMU_IA = 66,
    MPU_IA = 67,
    CACHE_IA = 68,
}

Enumeration of all the interrupts.

Variants

WIFI_MAC = 0

0 - WIFI_MAC

WIFI_NMI = 1

1 - WIFI_NMI

WIFI_BB = 2

2 - WIFI_BB

BT_MAC = 3

3 - BT_MAC

BT_BB = 4

4 - BT_BB

BT_BB_NMI = 5

5 - BT_BB_NMI

RWBT = 6

6 - RWBT

RWBLE = 7

7 - RWBLE

RWBT_NMI = 8

8 - RWBT_NMI

RWBLE_NMI = 9

9 - RWBLE_NMI

UHCI0 = 12

12 - UHCI0

UHCI1 = 13

13 - UHCI1

TG0_T0_LEVEL = 14

14 - TG0_T0_LEVEL

TG0_T1_LEVEL = 15

15 - TG0_T1_LEVEL

TG0_WDT_LEVEL = 16

16 - TG0_WDT_LEVEL

TG0_LACT_LEVEL = 17

17 - TG0_LACT_LEVEL

TG1_T0_LEVEL = 18

18 - TG1_T0_LEVEL

TG1_T1_LEVEL = 19

19 - TG1_T1_LEVEL

TG1_WDT_LEVEL = 20

20 - TG1_WDT_LEVEL

TG1_LACT_LEVEL = 21

21 - TG1_LACT_LEVEL

GPIO = 22

22 - GPIO

GPIO_NMI = 23

23 - GPIO_NMI

FROM_CPU_INTR0 = 24

24 - FROM_CPU_INTR0

FROM_CPU_INTR1 = 25

25 - FROM_CPU_INTR1

FROM_CPU_INTR2 = 26

26 - FROM_CPU_INTR2

FROM_CPU_INTR3 = 27

27 - FROM_CPU_INTR3

SPI0 = 28

28 - SPI0

SPI1 = 29

29 - SPI1

SPI2 = 30

30 - SPI2

SPI3 = 31

31 - SPI3

I2S0 = 32

32 - I2S0

I2S1 = 33

33 - I2S1

UART0 = 34

34 - UART0

UART1 = 35

35 - UART1

UART2 = 36

36 - UART2

SDIO_HOST = 37

37 - SDIO_HOST

ETH_MAC = 38

38 - ETH_MAC

MCPWM0 = 39

39 - MCPWM0

MCPWM1 = 40

40 - MCPWM1

MCPWM2 = 41

41 - MCPWM2

MCPWM3 = 42

42 - MCPWM3

LEDC = 43

43 - LEDC

EFUSE = 44

44 - EFUSE

TWAI0 = 45

45 - TWAI0

RTC_CORE = 46

46 - RTC_CORE

RMT = 47

47 - RMT

PCNT = 48

48 - PCNT

I2C_EXT0 = 49

49 - I2C_EXT0

I2C_EXT1 = 50

50 - I2C_EXT1

RSA = 51

51 - RSA

SPI1_DMA = 52

52 - SPI1_DMA

SPI2_DMA = 53

53 - SPI2_DMA

SPI3_DMA = 54

54 - SPI3_DMA

WDT = 55

55 - WDT

TIMER1 = 56

56 - TIMER1

TIMER2 = 57

57 - TIMER2

TG0_T0_EDGE = 58

58 - TG0_T0_EDGE

TG0_T1_EDGE = 59

59 - TG0_T1_EDGE

TG0_WDT_EDGE = 60

60 - TG0_WDT_EDGE

TG0_LACT_EDGE = 61

61 - TG0_LACT_EDGE

TG1_T0_EDGE = 62

62 - TG1_T0_EDGE

TG1_T1_EDGE = 63

63 - TG1_T1_EDGE

TG1_WDT_EDGE = 64

64 - TG1_WDT_EDGE

TG1_LACT_EDGE = 65

65 - TG1_LACT_EDGE

MMU_IA = 66

66 - MMU_IA

MPU_IA = 67

67 - MPU_IA

CACHE_IA = 68

68 - CACHE_IA

Implementations

impl Interrupt

pub fn try_from(value: u16) -> Result<Self, TryFromInterruptError>

Attempt to convert a given value into an Interrupt

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt