1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 emacconfig: EMACCONFIG,
6 emacff: EMACFF,
7 _reserved2: [u8; 0x08],
8 emacgmiiaddr: EMACGMIIADDR,
9 emacmiidata: EMACMIIDATA,
10 emacfc: EMACFC,
11 _reserved5: [u8; 0x08],
12 emacdebug: EMACDEBUG,
13 pmt_rwuffr: PMT_RWUFFR,
14 pmt_csr: PMT_CSR,
15 emaclpi_crs: EMACLPI_CRS,
16 emaclpitimerscontrol: EMACLPITIMERSCONTROL,
17 emacints: EMACINTS,
18 emacintmask: EMACINTMASK,
19 emacaddr0high: EMACADDR0HIGH,
20 emacaddr0low: EMACADDR0LOW,
21 emacaddr1high: EMACADDR1HIGH,
22 emacaddr1low: EMACADDR1LOW,
23 emacaddr2high: EMACADDR2HIGH,
24 emacaddr2low: EMACADDR2LOW,
25 emacaddr3high: EMACADDR3HIGH,
26 emacaddr3low: EMACADDR3LOW,
27 emacaddr4high: EMACADDR4HIGH,
28 emacaddr4low: EMACADDR4LOW,
29 emacaddr5high: EMACADDR5HIGH,
30 emacaddr5low: EMACADDR5LOW,
31 emacaddr6high: EMACADDR6HIGH,
32 emacaddr6low: EMACADDR6LOW,
33 emacaddr7high: EMACADDR7HIGH,
34 emacaddr7low: EMACADDR7LOW,
35 _reserved28: [u8; 0x58],
36 emaccstatus: EMACCSTATUS,
37 emacwdogto: EMACWDOGTO,
38}
39impl RegisterBlock {
40 #[doc = "0x00 - MAC configuration"]
41 #[inline(always)]
42 pub const fn emacconfig(&self) -> &EMACCONFIG {
43 &self.emacconfig
44 }
45 #[doc = "0x04 - Frame filter settings"]
46 #[inline(always)]
47 pub const fn emacff(&self) -> &EMACFF {
48 &self.emacff
49 }
50 #[doc = "0x10 - PHY configuration access"]
51 #[inline(always)]
52 pub const fn emacgmiiaddr(&self) -> &EMACGMIIADDR {
53 &self.emacgmiiaddr
54 }
55 #[doc = "0x14 - PHY data read write"]
56 #[inline(always)]
57 pub const fn emacmiidata(&self) -> &EMACMIIDATA {
58 &self.emacmiidata
59 }
60 #[doc = "0x18 - Frame flow control"]
61 #[inline(always)]
62 pub const fn emacfc(&self) -> &EMACFC {
63 &self.emacfc
64 }
65 #[doc = "0x24 - Status debugging bits"]
66 #[inline(always)]
67 pub const fn emacdebug(&self) -> &EMACDEBUG {
68 &self.emacdebug
69 }
70 #[doc = "0x28 - The MSB (31st bit) must be zero.Bit j\\[30:0\\] is the byte mask. If Bit 1/2/3/4 (byte number) of the byte mask is set the CRC block processes the Filter 1/2/3/4 Offset + j of the incoming packet(PWKPTR is 0/1/2/3).RWKPTR is 0:Filter 0 Byte Mask .RWKPTR is 1:Filter 1 Byte Mask RWKPTR is 2:Filter 2 Byte Mask RWKPTR is 3:Filter 3 Byte Mask RWKPTR is 4:Bit 3/11/19/27 specifies the address type defining the destination address type of the pattern.When the bit is set the pattern applies to only multicast packets"]
71 #[inline(always)]
72 pub const fn pmt_rwuffr(&self) -> &PMT_RWUFFR {
73 &self.pmt_rwuffr
74 }
75 #[doc = "0x2c - PMT Control and Status"]
76 #[inline(always)]
77 pub const fn pmt_csr(&self) -> &PMT_CSR {
78 &self.pmt_csr
79 }
80 #[doc = "0x30 - LPI Control and Status"]
81 #[inline(always)]
82 pub const fn emaclpi_crs(&self) -> &EMACLPI_CRS {
83 &self.emaclpi_crs
84 }
85 #[doc = "0x34 - LPI Timers Control"]
86 #[inline(always)]
87 pub const fn emaclpitimerscontrol(&self) -> &EMACLPITIMERSCONTROL {
88 &self.emaclpitimerscontrol
89 }
90 #[doc = "0x38 - Interrupt status"]
91 #[inline(always)]
92 pub const fn emacints(&self) -> &EMACINTS {
93 &self.emacints
94 }
95 #[doc = "0x3c - Interrupt mask"]
96 #[inline(always)]
97 pub const fn emacintmask(&self) -> &EMACINTMASK {
98 &self.emacintmask
99 }
100 #[doc = "0x40 - Upper 16 bits of the first 6-byte MAC address"]
101 #[inline(always)]
102 pub const fn emacaddr0high(&self) -> &EMACADDR0HIGH {
103 &self.emacaddr0high
104 }
105 #[doc = "0x44 - This field contains the lower 32 bits of the first 6-byte MAC address. This is used by the MAC for filtering the received frames and inserting the MAC address in the Transmit Flow Control (Pause) Frames."]
106 #[inline(always)]
107 pub const fn emacaddr0low(&self) -> &EMACADDR0LOW {
108 &self.emacaddr0low
109 }
110 #[doc = "0x48 - Upper 16 bits of the second 6-byte MAC address"]
111 #[inline(always)]
112 pub const fn emacaddr1high(&self) -> &EMACADDR1HIGH {
113 &self.emacaddr1high
114 }
115 #[doc = "0x4c - This field contains the lower 32 bits of the second 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
116 #[inline(always)]
117 pub const fn emacaddr1low(&self) -> &EMACADDR1LOW {
118 &self.emacaddr1low
119 }
120 #[doc = "0x50 - Upper 16 bits of the third 6-byte MAC address"]
121 #[inline(always)]
122 pub const fn emacaddr2high(&self) -> &EMACADDR2HIGH {
123 &self.emacaddr2high
124 }
125 #[doc = "0x54 - This field contains the lower 32 bits of the third 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process."]
126 #[inline(always)]
127 pub const fn emacaddr2low(&self) -> &EMACADDR2LOW {
128 &self.emacaddr2low
129 }
130 #[doc = "0x58 - Upper 16 bits of the fourth 6-byte MAC address"]
131 #[inline(always)]
132 pub const fn emacaddr3high(&self) -> &EMACADDR3HIGH {
133 &self.emacaddr3high
134 }
135 #[doc = "0x5c - This field contains the lower 32 bits of the fourth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
136 #[inline(always)]
137 pub const fn emacaddr3low(&self) -> &EMACADDR3LOW {
138 &self.emacaddr3low
139 }
140 #[doc = "0x60 - Upper 16 bits of the fifth 6-byte MAC address"]
141 #[inline(always)]
142 pub const fn emacaddr4high(&self) -> &EMACADDR4HIGH {
143 &self.emacaddr4high
144 }
145 #[doc = "0x64 - This field contains the lower 32 bits of the fifth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process."]
146 #[inline(always)]
147 pub const fn emacaddr4low(&self) -> &EMACADDR4LOW {
148 &self.emacaddr4low
149 }
150 #[doc = "0x68 - Upper 16 bits of the sixth 6-byte MAC address"]
151 #[inline(always)]
152 pub const fn emacaddr5high(&self) -> &EMACADDR5HIGH {
153 &self.emacaddr5high
154 }
155 #[doc = "0x6c - This field contains the lower 32 bits of the sixth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process."]
156 #[inline(always)]
157 pub const fn emacaddr5low(&self) -> &EMACADDR5LOW {
158 &self.emacaddr5low
159 }
160 #[doc = "0x70 - Upper 16 bits of the seventh 6-byte MAC address"]
161 #[inline(always)]
162 pub const fn emacaddr6high(&self) -> &EMACADDR6HIGH {
163 &self.emacaddr6high
164 }
165 #[doc = "0x74 - This field contains the lower 32 bits of the seventh 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
166 #[inline(always)]
167 pub const fn emacaddr6low(&self) -> &EMACADDR6LOW {
168 &self.emacaddr6low
169 }
170 #[doc = "0x78 - Upper 16 bits of the eighth 6-byte MAC address"]
171 #[inline(always)]
172 pub const fn emacaddr7high(&self) -> &EMACADDR7HIGH {
173 &self.emacaddr7high
174 }
175 #[doc = "0x7c - This field contains the lower 32 bits of the eighth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
176 #[inline(always)]
177 pub const fn emacaddr7low(&self) -> &EMACADDR7LOW {
178 &self.emacaddr7low
179 }
180 #[doc = "0xd8 - Link communication status"]
181 #[inline(always)]
182 pub const fn emaccstatus(&self) -> &EMACCSTATUS {
183 &self.emaccstatus
184 }
185 #[doc = "0xdc - Watchdog timeout control"]
186 #[inline(always)]
187 pub const fn emacwdogto(&self) -> &EMACWDOGTO {
188 &self.emacwdogto
189 }
190}
191#[doc = "EMACCONFIG (rw) register accessor: MAC configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`emacconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacconfig`] module"]
192pub type EMACCONFIG = crate::Reg<emacconfig::EMACCONFIG_SPEC>;
193#[doc = "MAC configuration"]
194pub mod emacconfig;
195#[doc = "EMACFF (rw) register accessor: Frame filter settings\n\nYou can [`read`](crate::Reg::read) this register and get [`emacff::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacff::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacff`] module"]
196pub type EMACFF = crate::Reg<emacff::EMACFF_SPEC>;
197#[doc = "Frame filter settings"]
198pub mod emacff;
199#[doc = "EMACGMIIADDR (rw) register accessor: PHY configuration access\n\nYou can [`read`](crate::Reg::read) this register and get [`emacgmiiaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacgmiiaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacgmiiaddr`] module"]
200pub type EMACGMIIADDR = crate::Reg<emacgmiiaddr::EMACGMIIADDR_SPEC>;
201#[doc = "PHY configuration access"]
202pub mod emacgmiiaddr;
203#[doc = "EMACMIIDATA (rw) register accessor: PHY data read write\n\nYou can [`read`](crate::Reg::read) this register and get [`emacmiidata::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacmiidata::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacmiidata`] module"]
204pub type EMACMIIDATA = crate::Reg<emacmiidata::EMACMIIDATA_SPEC>;
205#[doc = "PHY data read write"]
206pub mod emacmiidata;
207#[doc = "EMACFC (rw) register accessor: Frame flow control\n\nYou can [`read`](crate::Reg::read) this register and get [`emacfc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacfc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacfc`] module"]
208pub type EMACFC = crate::Reg<emacfc::EMACFC_SPEC>;
209#[doc = "Frame flow control"]
210pub mod emacfc;
211#[doc = "EMACDEBUG (r) register accessor: Status debugging bits\n\nYou can [`read`](crate::Reg::read) this register and get [`emacdebug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacdebug`] module"]
212pub type EMACDEBUG = crate::Reg<emacdebug::EMACDEBUG_SPEC>;
213#[doc = "Status debugging bits"]
214pub mod emacdebug;
215#[doc = "PMT_RWUFFR (r) register accessor: The MSB (31st bit) must be zero.Bit j\\[30:0\\] is the byte mask. If Bit 1/2/3/4 (byte number) of the byte mask is set the CRC block processes the Filter 1/2/3/4 Offset + j of the incoming packet(PWKPTR is 0/1/2/3).RWKPTR is 0:Filter 0 Byte Mask .RWKPTR is 1:Filter 1 Byte Mask RWKPTR is 2:Filter 2 Byte Mask RWKPTR is 3:Filter 3 Byte Mask RWKPTR is 4:Bit 3/11/19/27 specifies the address type defining the destination address type of the pattern.When the bit is set the pattern applies to only multicast packets\n\nYou can [`read`](crate::Reg::read) this register and get [`pmt_rwuffr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmt_rwuffr`] module"]
216pub type PMT_RWUFFR = crate::Reg<pmt_rwuffr::PMT_RWUFFR_SPEC>;
217#[doc = "The MSB (31st bit) must be zero.Bit j\\[30:0\\] is the byte mask. If Bit 1/2/3/4 (byte number) of the byte mask is set the CRC block processes the Filter 1/2/3/4 Offset + j of the incoming packet(PWKPTR is 0/1/2/3).RWKPTR is 0:Filter 0 Byte Mask .RWKPTR is 1:Filter 1 Byte Mask RWKPTR is 2:Filter 2 Byte Mask RWKPTR is 3:Filter 3 Byte Mask RWKPTR is 4:Bit 3/11/19/27 specifies the address type defining the destination address type of the pattern.When the bit is set the pattern applies to only multicast packets"]
218pub mod pmt_rwuffr;
219#[doc = "PMT_CSR (r) register accessor: PMT Control and Status\n\nYou can [`read`](crate::Reg::read) this register and get [`pmt_csr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmt_csr`] module"]
220pub type PMT_CSR = crate::Reg<pmt_csr::PMT_CSR_SPEC>;
221#[doc = "PMT Control and Status"]
222pub mod pmt_csr;
223#[doc = "EMACLPI_CRS (r) register accessor: LPI Control and Status\n\nYou can [`read`](crate::Reg::read) this register and get [`emaclpi_crs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emaclpi_crs`] module"]
224pub type EMACLPI_CRS = crate::Reg<emaclpi_crs::EMACLPI_CRS_SPEC>;
225#[doc = "LPI Control and Status"]
226pub mod emaclpi_crs;
227#[doc = "EMACLPITIMERSCONTROL (r) register accessor: LPI Timers Control\n\nYou can [`read`](crate::Reg::read) this register and get [`emaclpitimerscontrol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emaclpitimerscontrol`] module"]
228pub type EMACLPITIMERSCONTROL = crate::Reg<emaclpitimerscontrol::EMACLPITIMERSCONTROL_SPEC>;
229#[doc = "LPI Timers Control"]
230pub mod emaclpitimerscontrol;
231#[doc = "EMACINTS (r) register accessor: Interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`emacints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacints`] module"]
232pub type EMACINTS = crate::Reg<emacints::EMACINTS_SPEC>;
233#[doc = "Interrupt status"]
234pub mod emacints;
235#[doc = "EMACINTMASK (rw) register accessor: Interrupt mask\n\nYou can [`read`](crate::Reg::read) this register and get [`emacintmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacintmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacintmask`] module"]
236pub type EMACINTMASK = crate::Reg<emacintmask::EMACINTMASK_SPEC>;
237#[doc = "Interrupt mask"]
238pub mod emacintmask;
239#[doc = "EMACADDR0HIGH (rw) register accessor: Upper 16 bits of the first 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr0high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr0high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr0high`] module"]
240pub type EMACADDR0HIGH = crate::Reg<emacaddr0high::EMACADDR0HIGH_SPEC>;
241#[doc = "Upper 16 bits of the first 6-byte MAC address"]
242pub mod emacaddr0high;
243#[doc = "EMACADDR0LOW (rw) register accessor: This field contains the lower 32 bits of the first 6-byte MAC address. This is used by the MAC for filtering the received frames and inserting the MAC address in the Transmit Flow Control (Pause) Frames.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr0low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr0low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr0low`] module"]
244pub type EMACADDR0LOW = crate::Reg<emacaddr0low::EMACADDR0LOW_SPEC>;
245#[doc = "This field contains the lower 32 bits of the first 6-byte MAC address. This is used by the MAC for filtering the received frames and inserting the MAC address in the Transmit Flow Control (Pause) Frames."]
246pub mod emacaddr0low;
247#[doc = "EMACADDR1HIGH (rw) register accessor: Upper 16 bits of the second 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr1high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr1high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr1high`] module"]
248pub type EMACADDR1HIGH = crate::Reg<emacaddr1high::EMACADDR1HIGH_SPEC>;
249#[doc = "Upper 16 bits of the second 6-byte MAC address"]
250pub mod emacaddr1high;
251#[doc = "EMACADDR1LOW (rw) register accessor: This field contains the lower 32 bits of the second 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr1low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr1low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr1low`] module"]
252pub type EMACADDR1LOW = crate::Reg<emacaddr1low::EMACADDR1LOW_SPEC>;
253#[doc = "This field contains the lower 32 bits of the second 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
254pub mod emacaddr1low;
255#[doc = "EMACADDR2HIGH (rw) register accessor: Upper 16 bits of the third 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr2high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr2high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr2high`] module"]
256pub type EMACADDR2HIGH = crate::Reg<emacaddr2high::EMACADDR2HIGH_SPEC>;
257#[doc = "Upper 16 bits of the third 6-byte MAC address"]
258pub mod emacaddr2high;
259#[doc = "EMACADDR2LOW (rw) register accessor: This field contains the lower 32 bits of the third 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr2low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr2low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr2low`] module"]
260pub type EMACADDR2LOW = crate::Reg<emacaddr2low::EMACADDR2LOW_SPEC>;
261#[doc = "This field contains the lower 32 bits of the third 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process."]
262pub mod emacaddr2low;
263#[doc = "EMACADDR3HIGH (rw) register accessor: Upper 16 bits of the fourth 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr3high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr3high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr3high`] module"]
264pub type EMACADDR3HIGH = crate::Reg<emacaddr3high::EMACADDR3HIGH_SPEC>;
265#[doc = "Upper 16 bits of the fourth 6-byte MAC address"]
266pub mod emacaddr3high;
267#[doc = "EMACADDR3LOW (rw) register accessor: This field contains the lower 32 bits of the fourth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr3low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr3low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr3low`] module"]
268pub type EMACADDR3LOW = crate::Reg<emacaddr3low::EMACADDR3LOW_SPEC>;
269#[doc = "This field contains the lower 32 bits of the fourth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
270pub mod emacaddr3low;
271#[doc = "EMACADDR4HIGH (rw) register accessor: Upper 16 bits of the fifth 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr4high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr4high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr4high`] module"]
272pub type EMACADDR4HIGH = crate::Reg<emacaddr4high::EMACADDR4HIGH_SPEC>;
273#[doc = "Upper 16 bits of the fifth 6-byte MAC address"]
274pub mod emacaddr4high;
275#[doc = "EMACADDR4LOW (rw) register accessor: This field contains the lower 32 bits of the fifth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr4low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr4low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr4low`] module"]
276pub type EMACADDR4LOW = crate::Reg<emacaddr4low::EMACADDR4LOW_SPEC>;
277#[doc = "This field contains the lower 32 bits of the fifth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process."]
278pub mod emacaddr4low;
279#[doc = "EMACADDR5HIGH (rw) register accessor: Upper 16 bits of the sixth 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr5high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr5high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr5high`] module"]
280pub type EMACADDR5HIGH = crate::Reg<emacaddr5high::EMACADDR5HIGH_SPEC>;
281#[doc = "Upper 16 bits of the sixth 6-byte MAC address"]
282pub mod emacaddr5high;
283#[doc = "EMACADDR5LOW (rw) register accessor: This field contains the lower 32 bits of the sixth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr5low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr5low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr5low`] module"]
284pub type EMACADDR5LOW = crate::Reg<emacaddr5low::EMACADDR5LOW_SPEC>;
285#[doc = "This field contains the lower 32 bits of the sixth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process."]
286pub mod emacaddr5low;
287#[doc = "EMACADDR6HIGH (rw) register accessor: Upper 16 bits of the seventh 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr6high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr6high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr6high`] module"]
288pub type EMACADDR6HIGH = crate::Reg<emacaddr6high::EMACADDR6HIGH_SPEC>;
289#[doc = "Upper 16 bits of the seventh 6-byte MAC address"]
290pub mod emacaddr6high;
291#[doc = "EMACADDR6LOW (rw) register accessor: This field contains the lower 32 bits of the seventh 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr6low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr6low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr6low`] module"]
292pub type EMACADDR6LOW = crate::Reg<emacaddr6low::EMACADDR6LOW_SPEC>;
293#[doc = "This field contains the lower 32 bits of the seventh 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
294pub mod emacaddr6low;
295#[doc = "EMACADDR7HIGH (rw) register accessor: Upper 16 bits of the eighth 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr7high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr7high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr7high`] module"]
296pub type EMACADDR7HIGH = crate::Reg<emacaddr7high::EMACADDR7HIGH_SPEC>;
297#[doc = "Upper 16 bits of the eighth 6-byte MAC address"]
298pub mod emacaddr7high;
299#[doc = "EMACADDR7LOW (rw) register accessor: This field contains the lower 32 bits of the eighth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr7low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr7low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacaddr7low`] module"]
300pub type EMACADDR7LOW = crate::Reg<emacaddr7low::EMACADDR7LOW_SPEC>;
301#[doc = "This field contains the lower 32 bits of the eighth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process."]
302pub mod emacaddr7low;
303#[doc = "EMACCSTATUS (r) register accessor: Link communication status\n\nYou can [`read`](crate::Reg::read) this register and get [`emaccstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emaccstatus`] module"]
304pub type EMACCSTATUS = crate::Reg<emaccstatus::EMACCSTATUS_SPEC>;
305#[doc = "Link communication status"]
306pub mod emaccstatus;
307#[doc = "EMACWDOGTO (rw) register accessor: Watchdog timeout control\n\nYou can [`read`](crate::Reg::read) this register and get [`emacwdogto::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacwdogto::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emacwdogto`] module"]
308pub type EMACWDOGTO = crate::Reg<emacwdogto::EMACWDOGTO_SPEC>;
309#[doc = "Watchdog timeout control"]
310pub mod emacwdogto;