1#[doc = "Register `INT_ST` reader"]
2pub type R = crate::R<INT_ST_SPEC>;
3#[doc = "Field `TIMER0_STOP` reader - "]
4pub type TIMER0_STOP_R = crate::BitReader;
5#[doc = "Field `TIMER1_STOP` reader - "]
6pub type TIMER1_STOP_R = crate::BitReader;
7#[doc = "Field `TIMER2_STOP` reader - "]
8pub type TIMER2_STOP_R = crate::BitReader;
9#[doc = "Field `TIMER0_TEZ` reader - "]
10pub type TIMER0_TEZ_R = crate::BitReader;
11#[doc = "Field `TIMER1_TEZ` reader - "]
12pub type TIMER1_TEZ_R = crate::BitReader;
13#[doc = "Field `TIMER2_TEZ` reader - "]
14pub type TIMER2_TEZ_R = crate::BitReader;
15#[doc = "Field `TIMER0_TEP` reader - "]
16pub type TIMER0_TEP_R = crate::BitReader;
17#[doc = "Field `TIMER1_TEP` reader - "]
18pub type TIMER1_TEP_R = crate::BitReader;
19#[doc = "Field `TIMER2_TEP` reader - "]
20pub type TIMER2_TEP_R = crate::BitReader;
21#[doc = "Field `FAULT0` reader - "]
22pub type FAULT0_R = crate::BitReader;
23#[doc = "Field `FAULT1` reader - "]
24pub type FAULT1_R = crate::BitReader;
25#[doc = "Field `FAULT2` reader - "]
26pub type FAULT2_R = crate::BitReader;
27#[doc = "Field `FAULT0_CLR` reader - "]
28pub type FAULT0_CLR_R = crate::BitReader;
29#[doc = "Field `FAULT1_CLR` reader - "]
30pub type FAULT1_CLR_R = crate::BitReader;
31#[doc = "Field `FAULT2_CLR` reader - "]
32pub type FAULT2_CLR_R = crate::BitReader;
33#[doc = "Field `OP0_TEA` reader - "]
34pub type OP0_TEA_R = crate::BitReader;
35#[doc = "Field `OP1_TEA` reader - "]
36pub type OP1_TEA_R = crate::BitReader;
37#[doc = "Field `OP2_TEA` reader - "]
38pub type OP2_TEA_R = crate::BitReader;
39#[doc = "Field `OP0_TEB` reader - "]
40pub type OP0_TEB_R = crate::BitReader;
41#[doc = "Field `OP1_TEB` reader - "]
42pub type OP1_TEB_R = crate::BitReader;
43#[doc = "Field `OP2_TEB` reader - "]
44pub type OP2_TEB_R = crate::BitReader;
45#[doc = "Field `FH0_CBC` reader - "]
46pub type FH0_CBC_R = crate::BitReader;
47#[doc = "Field `FH1_CBC` reader - "]
48pub type FH1_CBC_R = crate::BitReader;
49#[doc = "Field `FH2_CBC` reader - "]
50pub type FH2_CBC_R = crate::BitReader;
51#[doc = "Field `FH0_OST` reader - "]
52pub type FH0_OST_R = crate::BitReader;
53#[doc = "Field `FH1_OST` reader - "]
54pub type FH1_OST_R = crate::BitReader;
55#[doc = "Field `FH2_OST` reader - "]
56pub type FH2_OST_R = crate::BitReader;
57#[doc = "Field `CAP0` reader - "]
58pub type CAP0_R = crate::BitReader;
59#[doc = "Field `CAP1` reader - "]
60pub type CAP1_R = crate::BitReader;
61#[doc = "Field `CAP2` reader - "]
62pub type CAP2_R = crate::BitReader;
63impl R {
64 #[doc = "Bit 0"]
65 #[inline(always)]
66 pub fn timer0_stop(&self) -> TIMER0_STOP_R {
67 TIMER0_STOP_R::new((self.bits & 1) != 0)
68 }
69 #[doc = "Bit 1"]
70 #[inline(always)]
71 pub fn timer1_stop(&self) -> TIMER1_STOP_R {
72 TIMER1_STOP_R::new(((self.bits >> 1) & 1) != 0)
73 }
74 #[doc = "Bit 2"]
75 #[inline(always)]
76 pub fn timer2_stop(&self) -> TIMER2_STOP_R {
77 TIMER2_STOP_R::new(((self.bits >> 2) & 1) != 0)
78 }
79 #[doc = "Bit 3"]
80 #[inline(always)]
81 pub fn timer0_tez(&self) -> TIMER0_TEZ_R {
82 TIMER0_TEZ_R::new(((self.bits >> 3) & 1) != 0)
83 }
84 #[doc = "Bit 4"]
85 #[inline(always)]
86 pub fn timer1_tez(&self) -> TIMER1_TEZ_R {
87 TIMER1_TEZ_R::new(((self.bits >> 4) & 1) != 0)
88 }
89 #[doc = "Bit 5"]
90 #[inline(always)]
91 pub fn timer2_tez(&self) -> TIMER2_TEZ_R {
92 TIMER2_TEZ_R::new(((self.bits >> 5) & 1) != 0)
93 }
94 #[doc = "Bit 6"]
95 #[inline(always)]
96 pub fn timer0_tep(&self) -> TIMER0_TEP_R {
97 TIMER0_TEP_R::new(((self.bits >> 6) & 1) != 0)
98 }
99 #[doc = "Bit 7"]
100 #[inline(always)]
101 pub fn timer1_tep(&self) -> TIMER1_TEP_R {
102 TIMER1_TEP_R::new(((self.bits >> 7) & 1) != 0)
103 }
104 #[doc = "Bit 8"]
105 #[inline(always)]
106 pub fn timer2_tep(&self) -> TIMER2_TEP_R {
107 TIMER2_TEP_R::new(((self.bits >> 8) & 1) != 0)
108 }
109 #[doc = "Bit 9"]
110 #[inline(always)]
111 pub fn fault0(&self) -> FAULT0_R {
112 FAULT0_R::new(((self.bits >> 9) & 1) != 0)
113 }
114 #[doc = "Bit 10"]
115 #[inline(always)]
116 pub fn fault1(&self) -> FAULT1_R {
117 FAULT1_R::new(((self.bits >> 10) & 1) != 0)
118 }
119 #[doc = "Bit 11"]
120 #[inline(always)]
121 pub fn fault2(&self) -> FAULT2_R {
122 FAULT2_R::new(((self.bits >> 11) & 1) != 0)
123 }
124 #[doc = "Bit 12"]
125 #[inline(always)]
126 pub fn fault0_clr(&self) -> FAULT0_CLR_R {
127 FAULT0_CLR_R::new(((self.bits >> 12) & 1) != 0)
128 }
129 #[doc = "Bit 13"]
130 #[inline(always)]
131 pub fn fault1_clr(&self) -> FAULT1_CLR_R {
132 FAULT1_CLR_R::new(((self.bits >> 13) & 1) != 0)
133 }
134 #[doc = "Bit 14"]
135 #[inline(always)]
136 pub fn fault2_clr(&self) -> FAULT2_CLR_R {
137 FAULT2_CLR_R::new(((self.bits >> 14) & 1) != 0)
138 }
139 #[doc = "Bit 15"]
140 #[inline(always)]
141 pub fn op0_tea(&self) -> OP0_TEA_R {
142 OP0_TEA_R::new(((self.bits >> 15) & 1) != 0)
143 }
144 #[doc = "Bit 16"]
145 #[inline(always)]
146 pub fn op1_tea(&self) -> OP1_TEA_R {
147 OP1_TEA_R::new(((self.bits >> 16) & 1) != 0)
148 }
149 #[doc = "Bit 17"]
150 #[inline(always)]
151 pub fn op2_tea(&self) -> OP2_TEA_R {
152 OP2_TEA_R::new(((self.bits >> 17) & 1) != 0)
153 }
154 #[doc = "Bit 18"]
155 #[inline(always)]
156 pub fn op0_teb(&self) -> OP0_TEB_R {
157 OP0_TEB_R::new(((self.bits >> 18) & 1) != 0)
158 }
159 #[doc = "Bit 19"]
160 #[inline(always)]
161 pub fn op1_teb(&self) -> OP1_TEB_R {
162 OP1_TEB_R::new(((self.bits >> 19) & 1) != 0)
163 }
164 #[doc = "Bit 20"]
165 #[inline(always)]
166 pub fn op2_teb(&self) -> OP2_TEB_R {
167 OP2_TEB_R::new(((self.bits >> 20) & 1) != 0)
168 }
169 #[doc = "Bit 21"]
170 #[inline(always)]
171 pub fn fh0_cbc(&self) -> FH0_CBC_R {
172 FH0_CBC_R::new(((self.bits >> 21) & 1) != 0)
173 }
174 #[doc = "Bit 22"]
175 #[inline(always)]
176 pub fn fh1_cbc(&self) -> FH1_CBC_R {
177 FH1_CBC_R::new(((self.bits >> 22) & 1) != 0)
178 }
179 #[doc = "Bit 23"]
180 #[inline(always)]
181 pub fn fh2_cbc(&self) -> FH2_CBC_R {
182 FH2_CBC_R::new(((self.bits >> 23) & 1) != 0)
183 }
184 #[doc = "Bit 24"]
185 #[inline(always)]
186 pub fn fh0_ost(&self) -> FH0_OST_R {
187 FH0_OST_R::new(((self.bits >> 24) & 1) != 0)
188 }
189 #[doc = "Bit 25"]
190 #[inline(always)]
191 pub fn fh1_ost(&self) -> FH1_OST_R {
192 FH1_OST_R::new(((self.bits >> 25) & 1) != 0)
193 }
194 #[doc = "Bit 26"]
195 #[inline(always)]
196 pub fn fh2_ost(&self) -> FH2_OST_R {
197 FH2_OST_R::new(((self.bits >> 26) & 1) != 0)
198 }
199 #[doc = "Bit 27"]
200 #[inline(always)]
201 pub fn cap0(&self) -> CAP0_R {
202 CAP0_R::new(((self.bits >> 27) & 1) != 0)
203 }
204 #[doc = "Bit 28"]
205 #[inline(always)]
206 pub fn cap1(&self) -> CAP1_R {
207 CAP1_R::new(((self.bits >> 28) & 1) != 0)
208 }
209 #[doc = "Bit 29"]
210 #[inline(always)]
211 pub fn cap2(&self) -> CAP2_R {
212 CAP2_R::new(((self.bits >> 29) & 1) != 0)
213 }
214}
215#[cfg(feature = "impl-register-debug")]
216impl core::fmt::Debug for R {
217 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
218 f.debug_struct("INT_ST")
219 .field("timer0_stop", &self.timer0_stop())
220 .field("timer1_stop", &self.timer1_stop())
221 .field("timer2_stop", &self.timer2_stop())
222 .field("timer0_tez", &self.timer0_tez())
223 .field("timer1_tez", &self.timer1_tez())
224 .field("timer2_tez", &self.timer2_tez())
225 .field("timer0_tep", &self.timer0_tep())
226 .field("timer1_tep", &self.timer1_tep())
227 .field("timer2_tep", &self.timer2_tep())
228 .field("fault0", &self.fault0())
229 .field("fault1", &self.fault1())
230 .field("fault2", &self.fault2())
231 .field("fault0_clr", &self.fault0_clr())
232 .field("fault1_clr", &self.fault1_clr())
233 .field("fault2_clr", &self.fault2_clr())
234 .field("op0_tea", &self.op0_tea())
235 .field("op1_tea", &self.op1_tea())
236 .field("op2_tea", &self.op2_tea())
237 .field("op0_teb", &self.op0_teb())
238 .field("op1_teb", &self.op1_teb())
239 .field("op2_teb", &self.op2_teb())
240 .field("fh0_cbc", &self.fh0_cbc())
241 .field("fh1_cbc", &self.fh1_cbc())
242 .field("fh2_cbc", &self.fh2_cbc())
243 .field("fh0_ost", &self.fh0_ost())
244 .field("fh1_ost", &self.fh1_ost())
245 .field("fh2_ost", &self.fh2_ost())
246 .field("cap0", &self.cap0())
247 .field("cap1", &self.cap1())
248 .field("cap2", &self.cap2())
249 .finish()
250 }
251}
252#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
253pub struct INT_ST_SPEC;
254impl crate::RegisterSpec for INT_ST_SPEC {
255 type Ux = u32;
256}
257#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
258impl crate::Readable for INT_ST_SPEC {}
259#[doc = "`reset()` method sets INT_ST to value 0"]
260impl crate::Resettable for INT_ST_SPEC {
261 const RESET_VALUE: u32 = 0;
262}